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A Multiprocessor Architecture Using Modular Arithmetic for Very High Precision Computation

Author(s)
Wu, Henry M.
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Abstract
We outline a multiprocessor architecture that uses modular arithmetic to implement numerical computation with 900 bits of intermediate precision. A proposed prototype, to be implemented with off-the-shelf parts, will perform high-precision arithmetic as fast as some workstations and mini- computers can perform IEEE double-precision arithmetic. We discuss how the structure of modular arithmetic conveniently maps into a simple, pipelined multiprocessor architecture. We present techniques we developed to overcome a few classical drawbacks of modular arithmetic. Our architecture is suitable to and essential for the study of chaotic dynamical systems.
Date issued
1989-04-01
URI
http://hdl.handle.net/1721.1/6021
Other identifiers
AIM-1119
Series/Report no.
AIM-1119
Keywords
modular arithmetic, computer architecture, multiprocessor, sresidue number system, computer arithmetic, pipelining, chaos

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