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A 73.1dB SNDR Digitally Assisted Subsampler for RF Power Amplifier Linearization Systems

Author(s)
Chung, SungWon; Dawson, Joel L.
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Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use.
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Abstract
We present a digitally assisted subsampler, designed to serve as the downconversion path in adaptive predistorters for 800MHz–5.8GHz RF power amplifiers. We use digital averaging to overcome the noise folding problems of subsampling, obtaining a final SNDR of 73.1dB for signals centered about a 2.4GHz carrier. Using quadrature subsampling, we obtain both the I and Q samples from the same physical path and thereby eliminate IQ gain mismatch. When used as part of an adaptive predistortion system, the subsampler enables an EVM improvement of 3.2% and distortion products suppression of up to 7.6dB for 802.11g signals. The subsampler IC, designed in a 90nm CMOS process, consumes 6.0mW from a 1.2V supply.
Description
conference website
Date issued
2009-04
URI
http://hdl.handle.net/1721.1/60412
Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science; Massachusetts Institute of Technology. Microsystems Technology Laboratories
Journal
16th International Symposium on VLSI Technology, Systems and Applications (2009 VLSI-TSA)
Publisher
VLSI-TSA
Citation
Chung, SungWon and Joel L. Dawson. "A 73.1dB SNDR Digitally Assisted Subsampler for RF Power Amplifier Linearization Systems." 6th International Symposium on VLSI Technology, Systems and Applications (2009 VLSI-TSA), 27-29, April 2009, Hsinchu, Taiwan. © 2009 VLSI-TSA.
Version: Final published version

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