| dc.contributor.advisor | Steve Ward. | en_US |
| dc.contributor.author | Shoemaker, David R. (David Robert) | en_US |
| dc.date.accessioned | 2011-01-26T14:16:19Z | |
| dc.date.available | 2011-01-26T14:16:19Z | |
| dc.date.copyright | 1992 | en_US |
| dc.date.issued | 1992 | en_US |
| dc.identifier.uri | http://hdl.handle.net/1721.1/60734 | |
| dc.description | Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1992. | en_US |
| dc.description | Includes bibliographical references (leaf 151). | en_US |
| dc.description.statementofresponsibility | by David R. Shoemaker. | en_US |
| dc.format.extent | 151 leaves | en_US |
| dc.language.iso | eng | en_US |
| dc.publisher | Massachusetts Institute of Technology | en_US |
| dc.rights | M.I.T. theses are protected by
copyright. They may be viewed from this source for any purpose, but
reproduction or distribution in any format is prohibited without written
permission. See provided URL for inquiries about permission. | en_US |
| dc.rights.uri | http://dspace.mit.edu/handle/1721.1/7582 | en_US |
| dc.subject | Electrical Engineering and Computer Science | en_US |
| dc.title | A performance measure of page mode dram as a second level cache in microprocessors | en_US |
| dc.type | Thesis | en_US |
| dc.description.degree | M.S. | en_US |
| dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | |
| dc.identifier.oclc | 27001331 | en_US |
