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A zero-crossing based pipelined analog-to-digital converter with supply voltage scalibility

Author(s)
Lee, Sunghyuk
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Alternative title
Zero-crossing based pipelined ADC with supply voltage scalibility
Other Contributors
Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
Advisor
Anantha P. Chandrakasan and Hae-Seung Lee.
Terms of use
M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582
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Abstract
A zero-crossing based pipelined analog-to-digital converter (ADC) has been designed and is fabricated in a 65nm CMOS process. The highly digital implementation characteristic of the zero-crossing detection technique enables energy efficient operation and voltage scaling. Supply voltage scaling based on the required sampling frequency and resolution provides high energy efficiency over a wide range of sampling frequencies and resolutions. A two phase charge transfer scheme (course charge transfer and fine charge transfer) is used to achieve high speed and high resolution. Using switched capacitor circuit, two phase charge transfer scheme is implemented without increasing power and circuit complexity.
Description
Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2010.
 
Cataloged from PDF version of thesis.
 
Includes bibliographical references (p. 73-76).
 
Date issued
2010
URI
http://hdl.handle.net/1721.1/62446
Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Publisher
Massachusetts Institute of Technology
Keywords
Electrical Engineering and Computer Science.

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