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The M-Machine Multicomputer

Author(s)
Fillo, Marco; Keckler, Stephen W.; Dally, William J.; Carter, Nicholas P.; Chang, Andrew; Gurevich, Yevgeny; Lee, Whay S.; ... Show more Show less
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Abstract
The M-Machine is an experimental multicomputer being developed to test architectural concepts motivated by the constraints of modern semiconductor technology and the demands of programming systems. The M- Machine computing nodes are connected with a 3-D mesh network; each node is a multithreaded processor incorporating 12 function units, on-chip cache, and local memory. The multiple function units are used to exploit both instruction-level and thread-level parallelism. A user accessible message passing system yields fast communication and synchronization between nodes. Rapid access to remote memory is provided transparently to the user with a combination of hardware and software mechanisms. This paper presents the architecture of the M-Machine and describes how its mechanisms maximize both single thread performance and overall system throughput.
Date issued
1995-03-01
URI
http://hdl.handle.net/1721.1/6636
Other identifiers
AIM-1532
Series/Report no.
AIM-1532

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