dc.contributor.author | Nausieda, Ivan A. | |
dc.contributor.author | Ryu, Kevin K. | |
dc.contributor.author | He, David Da | |
dc.contributor.author | Akinwande, Akintunde Ibitayo | |
dc.contributor.author | Bulovic, Vladimir | |
dc.contributor.author | Sodini, Charles G. | |
dc.date.accessioned | 2012-07-25T20:11:11Z | |
dc.date.available | 2012-07-25T20:11:11Z | |
dc.date.issued | 2010-11 | |
dc.date.submitted | 2010-07 | |
dc.identifier.issn | 0018-9383 | |
dc.identifier.other | INSPEC Accession Number: 11596967 | |
dc.identifier.uri | http://hdl.handle.net/1721.1/71816 | |
dc.description.abstract | A fully photolithographic dual threshold voltage (VT) organic thin-film transistor (OTFT) process suitable for flexible large-area integrated circuits is presented. The nearroom-temperature (<; 95 °C) process produces integrated dual VT pentacene-based p-channel transistors. The two VT 's are enabled by using two gate metals of low (aluminum) and high (platinum) work function. The Al and Pt gate OTFTs exhibit nominally identical current-voltage transfer curves shifted by an amount ΔVT. The availability of a high-VT device enables area-efficient zero-Vos high-output-resistance current sources, enabling high-gain inverters. We present positive noise margin inverters and rail-to-rail ring oscillators powered by a 3-V supply-one of the lowest supply voltages reported for OTFT circuits. These results show that integrating nand p-channel organic devices is not mandatory to achieve functional area-efficient low-power organic integrated circuits. | en_US |
dc.description.sponsorship | Semiconductor Research Corporation. Focus Center Research Program for Center for Circuits and Systems Solutions (Contract 2003-CT-888) | en_US |
dc.language.iso | en_US | |
dc.publisher | Institute of Electrical and Electronics Engineers | en_US |
dc.relation.isversionof | http://dx.doi.org/10.1109/TED.2010.2072550 | en_US |
dc.rights | Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use. | en_US |
dc.source | IEEE | en_US |
dc.title | Dual threshold voltage organic thin-film transistor technology | en_US |
dc.type | Article | en_US |
dc.identifier.citation | Nausieda, Ivan et al. “Dual Threshold Voltage Organic Thin-Film Transistor Technology.” IEEE Transactions on Electron Devices 57.11 (2010): 3027–3032. Web. | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Microsystems Technology Laboratories | en_US |
dc.contributor.approver | Akinwande, Akintunde Ibitayo | |
dc.contributor.mitauthor | Nausieda, Ivan A. | |
dc.contributor.mitauthor | Ryu, Kevin K. | |
dc.contributor.mitauthor | He, David Da | |
dc.contributor.mitauthor | Akinwande, Akintunde Ibitayo | |
dc.contributor.mitauthor | Bulovic, Vladimir | |
dc.contributor.mitauthor | Sodini, Charles G. | |
dc.relation.journal | IEEE Transactions on Electron Devices | en_US |
dc.eprint.version | Final published version | en_US |
dc.type.uri | http://purl.org/eprint/type/JournalArticle | en_US |
eprint.status | http://purl.org/eprint/status/PeerReviewed | en_US |
dspace.orderedauthors | Nausieda, Ivan; Ryu, Kevin Kyungbum; He, David Da; Akinwande, Akintunde Ibitayo; Bulovic, Vladimir; Sodini, Charles G. | en |
dc.identifier.orcid | https://orcid.org/0000-0003-3001-9223 | |
dc.identifier.orcid | https://orcid.org/0000-0002-0960-2580 | |
dc.identifier.orcid | https://orcid.org/0000-0002-0413-8774 | |
mit.license | PUBLISHER_POLICY | en_US |
mit.metadata.status | Complete | |