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dc.contributor.authorNausieda, Ivan A.
dc.contributor.authorRyu, Kevin K.
dc.contributor.authorHe, David Da
dc.contributor.authorAkinwande, Akintunde Ibitayo
dc.contributor.authorBulovic, Vladimir
dc.contributor.authorSodini, Charles G.
dc.date.accessioned2012-07-25T20:11:11Z
dc.date.available2012-07-25T20:11:11Z
dc.date.issued2010-11
dc.date.submitted2010-07
dc.identifier.issn0018-9383
dc.identifier.otherINSPEC Accession Number: 11596967
dc.identifier.urihttp://hdl.handle.net/1721.1/71816
dc.description.abstractA fully photolithographic dual threshold voltage (VT) organic thin-film transistor (OTFT) process suitable for flexible large-area integrated circuits is presented. The nearroom-temperature (<; 95 °C) process produces integrated dual VT pentacene-based p-channel transistors. The two VT 's are enabled by using two gate metals of low (aluminum) and high (platinum) work function. The Al and Pt gate OTFTs exhibit nominally identical current-voltage transfer curves shifted by an amount ΔVT. The availability of a high-VT device enables area-efficient zero-Vos high-output-resistance current sources, enabling high-gain inverters. We present positive noise margin inverters and rail-to-rail ring oscillators powered by a 3-V supply-one of the lowest supply voltages reported for OTFT circuits. These results show that integrating nand p-channel organic devices is not mandatory to achieve functional area-efficient low-power organic integrated circuits.en_US
dc.description.sponsorshipSemiconductor Research Corporation. Focus Center Research Program for Center for Circuits and Systems Solutions (Contract 2003-CT-888)en_US
dc.language.isoen_US
dc.publisherInstitute of Electrical and Electronics Engineersen_US
dc.relation.isversionofhttp://dx.doi.org/10.1109/TED.2010.2072550en_US
dc.rightsArticle is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use.en_US
dc.sourceIEEEen_US
dc.titleDual threshold voltage organic thin-film transistor technologyen_US
dc.typeArticleen_US
dc.identifier.citationNausieda, Ivan et al. “Dual Threshold Voltage Organic Thin-Film Transistor Technology.” IEEE Transactions on Electron Devices 57.11 (2010): 3027–3032. Web.en_US
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Scienceen_US
dc.contributor.departmentMassachusetts Institute of Technology. Microsystems Technology Laboratoriesen_US
dc.contributor.approverAkinwande, Akintunde Ibitayo
dc.contributor.mitauthorNausieda, Ivan A.
dc.contributor.mitauthorRyu, Kevin K.
dc.contributor.mitauthorHe, David Da
dc.contributor.mitauthorAkinwande, Akintunde Ibitayo
dc.contributor.mitauthorBulovic, Vladimir
dc.contributor.mitauthorSodini, Charles G.
dc.relation.journalIEEE Transactions on Electron Devicesen_US
dc.eprint.versionFinal published versionen_US
dc.type.urihttp://purl.org/eprint/type/JournalArticleen_US
eprint.statushttp://purl.org/eprint/status/PeerRevieweden_US
dspace.orderedauthorsNausieda, Ivan; Ryu, Kevin Kyungbum; He, David Da; Akinwande, Akintunde Ibitayo; Bulovic, Vladimir; Sodini, Charles G.en
dc.identifier.orcidhttps://orcid.org/0000-0003-3001-9223
dc.identifier.orcidhttps://orcid.org/0000-0002-0960-2580
dc.identifier.orcidhttps://orcid.org/0000-0002-0413-8774
mit.licensePUBLISHER_POLICYen_US
mit.metadata.statusComplete


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