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dc.contributor.authorMetreveli, Zviad
dc.contributor.authorZeldovich, Nickolai
dc.contributor.authorKaashoek, M. Frans
dc.date.accessioned2012-09-11T15:15:28Z
dc.date.available2012-09-11T15:15:28Z
dc.date.issued2012-02
dc.identifier.issn978-1-4503-1160-1
dc.identifier.urihttp://hdl.handle.net/1721.1/72613
dc.description.abstractCPHash is a concurrent hash table for multicore processors. CPHash partitions its table across the caches of cores and uses message passing to transfer lookups/inserts to a partition. CPHash's message passing avoids the need for locks, pipelines batches of asynchronous messages, and packs multiple messages into a single cache line transfer. Experiments on a 80-core machine with 2 hardware threads per core show that CPHash has ~1.6x higher throughput than a hash table implemented using fine-grained locks. An analysis shows that CPHash wins because it experiences fewer cache misses and its cache misses are less expensive, because of less contention for the on-chip interconnect and DRAM. CPServer, a key/value cache server using CPHash, achieves ~5% higher throughput than a key/value cache server that uses a hash table with fine-grained locks, but both achieve better throughput and scalability than memcached. The throughput of CPHash and CPServer also scale near-linearly with the number of cores.en_US
dc.description.sponsorshipQuanta Computer (Firm)en_US
dc.description.sponsorshipNational Science Foundation (U.S.). (Award 915164)en_US
dc.language.isoen_US
dc.publisherAssociation for Computing Machinery (ACM)en_US
dc.relation.isversionofhttp://dx.doi.org/10.1145/2145816.2145874en_US
dc.rightsCreative Commons Attribution-Noncommercial-Share Alike 3.0en_US
dc.rights.urihttp://creativecommons.org/licenses/by-nc-sa/3.0/en_US
dc.sourceMIT web domainen_US
dc.titleCPHASH: A cache-partitioned hash tableen_US
dc.typeArticleen_US
dc.identifier.citationZviad Metreveli, Nickolai Zeldovich, and M. Frans Kaashoek. 2012. CPHASH: a cache-partitioned hash table. In Proceedings of the 17th ACM SIGPLAN symposium on Principles and Practice of Parallel Programming (PPoPP '12). ACM, New York, NY, USA, 319-320.en_US
dc.contributor.departmentMassachusetts Institute of Technology. Computer Science and Artificial Intelligence Laboratoryen_US
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Scienceen_US
dc.contributor.approverKaashoek, M. Frans
dc.contributor.mitauthorMetreveli, Zviad
dc.contributor.mitauthorZeldovich, Nickolai
dc.contributor.mitauthorKaashoek, M. Frans
dc.relation.journalProceedings of the 17th ACM SIGPLAN symposium on Principles and Practice of Parallel Programming (PPoPP '12)en_US
dc.eprint.versionAuthor's final manuscripten_US
dc.type.urihttp://purl.org/eprint/type/ConferencePaperen_US
dspace.orderedauthorsMetreveli, Zviad; Zeldovich, Nickolai; Kaashoek, M. Fransen
dc.identifier.orcidhttps://orcid.org/0000-0003-0238-2703
dc.identifier.orcidhttps://orcid.org/0000-0001-7098-586X
mit.licenseOPEN_ACCESS_POLICYen_US
mit.metadata.statusComplete


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