dc.contributor.author | Leong, Hoi Liong | |
dc.contributor.author | Gan, C.L. | |
dc.contributor.author | Pey, Kin Leong | |
dc.contributor.author | Tsang, Chi-fo | |
dc.contributor.author | Thompson, Carl V. | |
dc.contributor.author | Hongyu, Li | |
dc.date.accessioned | 2004-12-10T14:24:14Z | |
dc.date.available | 2004-12-10T14:24:14Z | |
dc.date.issued | 2005-01 | |
dc.identifier.uri | http://hdl.handle.net/1721.1/7372 | |
dc.description.abstract | Three dimensional (3-D) integrated circuits can be fabricated by bonding previously processed device layers using metal-metal bonds that also serve as layer-to-layer interconnects. Bonded copper interconnects test structures were created by thermocompression bonding and the bond toughness was measured using the four-point test. The effects of bonding temperature, physical bonding and failure mechanisms were investigated. The surface effects on copper surface due to pre-bond clean (with glacial acetic acid) were also looked into. A maximum average bond toughness of approximately 35 J/m² was obtained bonding temperature 300 C. | en |
dc.description.sponsorship | Singapore-MIT Alliance (SMA) | en |
dc.format.extent | 11870 bytes | |
dc.format.mimetype | application/pdf | |
dc.language.iso | en | |
dc.relation.ispartofseries | Advanced Materials for Micro- and Nano-Systems (AMMNS); | |
dc.subject | three dimensional integrated circuits | en |
dc.subject | bonded copper interconnects | en |
dc.subject | bonding | en |
dc.subject | fabrication | en |
dc.title | Preliminary Characterisation of Low-Temperature Bonded Copper Interconnects for 3-D Integrated Circuits | en |
dc.type | Article | en |