Now showing items 1-2 of 2
Energy-efficient SRAM design in 28nm FDSOI Technology
(Massachusetts Institute of Technology, 2014)
As CMOS scaling continues to sub-32nm regime, the effects of device variations become more prominent. This is very critical in SRAMs, which use very small transistor dimensions to achieve high memory density. The conventional ...
Energy-efficient smart embedded memory design for IoT and AI
(Massachusetts Institute of Technology, 2018)
Static Random Access Memory (SRAM) continues to be the embedded memory of choice for modern System-on-a-Chip (SoC) applications, thanks to aggressive CMOS scaling, which keeps on providing higher storage density per unit ...