MOSFET channel engineering using strained Si and strained Ge grown on SiGe virtual substrates

Abstract

As the economic and technological benefits of scaling in very-large-scale-integrated (VLSI) circuits decreases, the use of alternative channel materials such as germanium and strained silicon ([epsilon]-Si) is increasingly being considered as a method for improving the performance of MOSFETs. While [epsilon]-Si grown on relaxed Si[sub]l-x Ge[sub]x (i.e. single-channel heterostructure) is drawing closer to widespread commercialization, it is currently believed that almost all of the performance benefit in CMOS implementations will derive from the n-MOSFET. [epsilon]-Si p-MOSFETs demonstrate enhanced hole mobility, but the enhancement has been shown to degrade at high vertical fields for reasons that are still poorly understood. Dual-channel heterostructures, where a compressively-strained, Ge-rich layer is grown between the [epsilon]-Si cap and relaxed Si[sub]l-x Ge[sub]x virtual substrate have been shown to offer much larger hole mobility enhancements. One of the primary goals of this thesis is to understand and improve the performance of both single- and dual-channel heterostructure p-MOSFETs. The approach taken was to grow novel heterostructures and then fabricate MOSFETs using a short process flow. Cross-sectional TEM was constantly employed as a way to connect microstructure with mobility characteristics. In this way, constant and rapid feedback between device results and the design of improved layer structures was achieved, and the map of available mobility enhancements in Si[sub]l-x Ge[sub]x-based heterostructures was greatly extended. The step preceding all of the device work was to optimize the growth of highly strained layers via ultrahigh-vacuum chemical vapor deposition (UHVCVD). The deposition of highly strained layers in compression and tension creates problems that are not encountered in the growth of [epsilon]-Si on Si-rich Si[sub]1-x Ge[sub]x virtual substrates. Through a combination of low-temperature growth and a novel two-step passivation-and-heating sequence, a wide variety of fully planar single- and dual-channel heterostructures can now be achieved in UHVCVD.

(cont.) While [epsilon]-Si p-MOSFETs tend to lose much of their mobility enhancement at large vertical fields, previous work shows that the situation improves as x in the Si[sub]l-x Ge[sub]x virtual substrate is increased to 0.5. The work presented here demonstrates that enhancements continue to improve for even higher Ge content. At x = 0.7, hole mobility enhancements of 2.9 times were observed with no degradation at very large inversion densities (i.e. >101̂3cm-̂2). Also, for the first time, a p-MOSFET with mobility enhancements that are independent of inversion density has been demonstrated through the use of a digital-alloy heterostructure. In general, it is shown that engineering the layer structure allows great control over the slope of hole mobility versus gate overdrive and that hole mobility enhancements that increase or remain constant with respect to inversion density can be attained. While the first demonstration of high hole mobility in strained Ge ([epsilon]-Ge) was published nearly 10 years ago, little or no work on enhancement mode p-MOSFETs utilizing [epsilon]-Ge had been published prior to this thesis ...