Reducing instruction cache energy using gated wordlines

Author(s)
Panich, Mukaya, 1975-
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Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science.
Advisor
Krste Asanovic.
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Description
Thesis (M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1999.
 
Includes bibliographical references (p. 87-88).
 
Date issued
1999
URI
http://hdl.handle.net/1721.1/80231
Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science.
Publisher
Massachusetts Institute of Technology
Keywords
Electrical Engineering and Computer Science.
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