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Hardware and software for a power-aware wireless microsensor node

Author(s)
Ickes, Nathan J. (Nathan Jeffrey), 1979-
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Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
Advisor
Anantha Chandrakasan.
Terms of use
M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582
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Abstract
This thesis examines important issues in the design of hardware and software for microsensor networks, with particular attention paid to mechanisms for providing power awareness. The [mu]AMPS Revision 1 microsensor node is used as an example. The design of this node implementation is described in detail, including, in particular, the design of the pAMPS processor board and its power-scalable architecture. The operating system and application programming interface for the node is described. Finally, an analysis is made of the power consumed by each of the node's subsystems, and these results are used to assess the degree of power-awareness provided by the [mu]AMPS Revision 1 node.
Description
Thesis (M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2002.
 
Includes bibliographical references (p. 143-144).
 
Date issued
2002
URI
http://hdl.handle.net/1721.1/8080
Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Publisher
Massachusetts Institute of Technology
Keywords
Electrical Engineering and Computer Science.

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