A many-core software framework for embedded space computing
Author(s)Sun, Eugene Yu-Ting
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science.
Joseph A. Kochocki and Christopher J. Terman.
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Space computing has long called for powerful yet power-efficient hardware for on-board computation. The emergence of many-core CPUs on a single die provides one potential solution. The development of processors like Maestro strives for the balance between computational power and energy efficiency. However, development in software has not kept up. Not a single dominant programming framework has emerged to allow developers to easily write applications to take advantage of the new multi-core paradigm. As a result, in NASA's technology roadmap, fault management, programmability, and energy management under the new multi-core paradigm have been listed as top challenges. The goal of this thesis is to develop a framework that streamlines programming for multi-core processors, in the form of a programming model and a C++ programming library. A 49-core Maestro Development Board (MDB) serves as the development and testing hardware platform. The framework's usability is tested through a software simulation of a vision-based crater recognition algorithm for a lunar lander. A parallel version of the algorithm is written under the framework and tested, and a performance gain of about 300%, using 21 Maestro cores, is observed over the RAD750. The uniqueness of this framework lies in the principle that task blocks, not CPU cores, are the fundamental abstraction for individual processes. Each task block is allocated an arbitrary number of CPUs, completes one task, and communicates with other task blocks through message passing. Fault tolerance, power management, and communication among task blocks are abstracted out so that programmers can concentrate on the implementation of the application. The resulting programming library provides developers with the right tools to design and test parallel programs, port serial versions of applications to their parallelized counterparts, and develop new parallel programs with ease.
Thesis: M. Eng., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2013.Cataloged from PDF version of thesis.Includes bibliographical references (pages 66-67).
DepartmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Science.
Massachusetts Institute of Technology
Electrical Engineering and Computer Science.