| dc.contributor.advisor | Srinivas Devadas. | en_US |
| dc.contributor.author | Hadjiyiannis, George Ioannou | en_US |
| dc.contributor.other | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science. | en_US |
| dc.date.accessioned | 2014-05-07T16:41:24Z | |
| dc.date.available | 2014-05-07T16:41:24Z | |
| dc.date.copyright | 2000 | en_US |
| dc.date.issued | 2000 | en_US |
| dc.identifier.uri | http://hdl.handle.net/1721.1/86440 | |
| dc.description | Thesis (Ph.D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2000. | en_US |
| dc.description | Includes bibliographical references (leaves 261-264). | en_US |
| dc.description.statementofresponsibility | by George Ioannou Hadjiyiannis. | en_US |
| dc.format.extent | 264 leaves | en_US |
| dc.language.iso | eng | en_US |
| dc.publisher | Massachusetts Institute of Technology | en_US |
| dc.rights | M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. | en_US |
| dc.rights.uri | http://dspace.mit.edu/handle/1721.1/7582 | en_US |
| dc.subject | Electrical Engineering and Computer Science. | en_US |
| dc.title | An architecture synthesis system for embedded processors | en_US |
| dc.type | Thesis | en_US |
| dc.description.degree | Ph.D. | en_US |
| dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | |
| dc.identifier.oclc | 46803386 | en_US |
