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An algorithm to efficiently and accurately compute the effective capacitances of interconnects driven by logic gates

dc.contributor.advisorJacob White.en_US
dc.contributor.authorStrojwas, Marcin A. (Marcin Andrzej), 1978-en_US
dc.contributor.otherMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Science.en_US
dc.date.accessioned2014-05-07T16:44:56Z
dc.date.available2014-05-07T16:44:56Z
dc.date.copyright2000en_US
dc.date.issued2000en_US
dc.identifier.urihttp://hdl.handle.net/1721.1/86492
dc.descriptionThesis (M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2000.en_US
dc.descriptionIncludes bibliographical references (leaf 21).en_US
dc.description.statementofresponsibilityby Marcin A. Strojwas.en_US
dc.format.extent21 leavesen_US
dc.language.isoengen_US
dc.publisherMassachusetts Institute of Technologyen_US
dc.rightsM.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.en_US
dc.rights.urihttp://dspace.mit.edu/handle/1721.1/7582en_US
dc.subjectElectrical Engineering and Computer Science.en_US
dc.titleAn algorithm to efficiently and accurately compute the effective capacitances of interconnects driven by logic gatesen_US
dc.typeThesisen_US
dc.description.degreeM.Eng.en_US
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
dc.identifier.oclc46893940en_US


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