dc.contributor.advisor | Saman Amarasinghe. | en_US |
dc.contributor.author | Sheldon, Jeffrey W. (Jeffrey William), 1978- | en_US |
dc.contributor.other | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science. | en_US |
dc.date.accessioned | 2014-05-07T17:09:49Z | |
dc.date.available | 2014-05-07T17:09:49Z | |
dc.date.copyright | 2001 | en_US |
dc.date.issued | 2001 | en_US |
dc.identifier.uri | http://hdl.handle.net/1721.1/86849 | |
dc.description | Thesis (M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2001. | en_US |
dc.description | Includes bibliographical references (leaves 53-54). | en_US |
dc.description.statementofresponsibility | by Jeffrey W. Sheldon. | en_US |
dc.format.extent | 54 leaves | en_US |
dc.language.iso | eng | en_US |
dc.publisher | Massachusetts Institute of Technology | en_US |
dc.rights | M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. | en_US |
dc.rights.uri | http://dspace.mit.edu/handle/1721.1/7582 | en_US |
dc.subject | Electrical Engineering and Computer Science. | en_US |
dc.title | Strength reduction of integer division and modulo operations | en_US |
dc.title.alternative | Strength reduction of integer division and module operations | en_US |
dc.type | Thesis | en_US |
dc.description.degree | M.Eng. | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | |
dc.identifier.oclc | 51627565 | en_US |