| dc.contributor.advisor | Michael Anthony and Charles G. Sodini. | en_US |
| dc.contributor.author | Kapusta, Ronald A. (Ronald Alan), 1979- | en_US |
| dc.contributor.other | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science. | en_US |
| dc.date.accessioned | 2014-05-23T19:09:18Z | |
| dc.date.available | 2014-05-23T19:09:18Z | |
| dc.date.copyright | 2002 | en_US |
| dc.date.issued | 2002 | en_US |
| dc.identifier.uri | http://hdl.handle.net/1721.1/87228 | |
| dc.description | Thesis (M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2002. | en_US |
| dc.description | Includes bibliographical references (p. 95-97). | en_US |
| dc.description.statementofresponsibility | by Ronald A. Kapusta, Jr. | en_US |
| dc.format.extent | 110 p. | en_US |
| dc.language.iso | eng | en_US |
| dc.publisher | Massachusetts Institute of Technology | en_US |
| dc.rights | M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. | en_US |
| dc.rights.uri | http://dspace.mit.edu/handle/1721.1/7582 | en_US |
| dc.subject | Electrical Engineering and Computer Science. | en_US |
| dc.title | A delay line architecture for high-speed analog-to-digital converters | en_US |
| dc.type | Thesis | en_US |
| dc.description.degree | M.Eng. | en_US |
| dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | |
| dc.identifier.oclc | 51319500 | en_US |
