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dc.contributor.advisorDuane S. Boning and Michael Perrott.en_US
dc.contributor.authorDrego, Nigel Anthony, 1980-en_US
dc.contributor.otherMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Science.en_US
dc.date.accessioned2014-05-23T19:21:40Z
dc.date.available2014-05-23T19:21:40Z
dc.date.copyright2003en_US
dc.date.issued2003en_US
dc.identifier.urihttp://hdl.handle.net/1721.1/87349
dc.descriptionThesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2003.en_US
dc.descriptionIncludes bibliographical references (p. 127-130).en_US
dc.description.statementofresponsibilityby Nigel Anthony Drego.en_US
dc.format.extent130 p.en_US
dc.language.isoengen_US
dc.publisherMassachusetts Institute of Technologyen_US
dc.rightsM.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.en_US
dc.rights.urihttp://dspace.mit.edu/handle/1721.1/7582en_US
dc.subjectElectrical Engineering and Computer Science.en_US
dc.titleA low-skew, low jitter receiver circuit for on-chip optical clock distributionen_US
dc.typeThesisen_US
dc.description.degreeS.M.en_US
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
dc.identifier.oclc53225537en_US


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