The development of a nonvolatile ferroelectric memory with nondestructive readout

Abstract

For the past three years, a project group at the Charles Stark Draper Laboratory has been developing a nonvolatile memory that uses novel ferroelectric technology. The advancements made could prove to give ferroelectrics a new lease on life as a memory technology by overcoming some of the inherent limitations that have hampered their use in the past. The primary advancement of the project has been the development of a nondestructive readout (NDRO) technique which exploits the hysteresis exhibited by the small-signal capacitance of ferroelectrics. This has led to the development of an NDRO sense amplifier which has evolved from circuit board prototypes to a fully custom CMOS part. A multichip module (MCM) was employed to integrate the CMOS technology with a ferroelectric technology. This thesis develops several models for the behavior of ferroelectrics, examines how ferroelectric memory compares to the more mainstream silicon-based memory technologies, and chronicles the project from the inception of the NDRO sensing technique through the production of the various experimental parts.