Queue occupancy in single-server deterministic service time tree networks
Author(s)Neely, Michael J. (Michael James), 1975-
Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
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Tree networks of single server, deterministic service time queues are often used as models for packet flow in systems with ATM traffic. In this thesis, we present methods of analyzing packet occupancy in these systems. We develop general theorems which enable the analysis of individual nodes within a multi-stage system to be reduced to the analysis of a simpler single-stage or 2- stage equivalent model. In these theorems, we make very few assumptions about the nature of the exogenous input processes themselves, and hence our results apply to a variety of input sources. In particular, we treat three input source cases: bursty on/off inputs, periodic continuous bit rate (CBR) inputs, and discrete time Generalized Independent (GI) inputs. For each of these input sources, we derive mean queue lengths for individual nodes and aggregate occupancy distribution functions for multi-stage systems. For GI-type inputs (which includes memoryless inputs), we derive explicit expressions for the means and variances of packet occupancy in any node of a multi-stage, deterministic service time tree network. We also create a general definition of a "distributable input," which includes any collection of M sources which run independently and are identically distributed (iid) according to some arbitrary type of arrival process (in particular, this includes periodic CBR sources). We demonstrate that the expected occupancy of a single-stage system is a convex, monotonic function of the distributable input loading. Furthermore, the expected occupancy of any node within a multi-stage tree network is a concave function of the multiple exogenous input loadings at the upstream nodes.
Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1999.Includes bibliographical references (p. 167).
DepartmentMassachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
Massachusetts Institute of Technology
Electrical Engineering and Computer Science.