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dc.contributor.authorRithe, Rahul
dc.contributor.authorRaina, Priyanka
dc.contributor.authorIckes, Nathan J.
dc.contributor.authorChandrakasan, Anantha P.
dc.contributor.authorTenneti, Srikanth V.
dc.date.accessioned2015-02-06T16:38:54Z
dc.date.available2015-02-06T16:38:54Z
dc.date.issued2013-02
dc.identifier.isbn978-1-4673-4516-3
dc.identifier.isbn978-1-4673-4515-6
dc.identifier.isbn978-1-4673-4514-9
dc.identifier.issn0193-6530
dc.identifier.urihttp://hdl.handle.net/1721.1/93899
dc.description.abstractComputational photography applications, such as lightfield photography, enable capture and synthesis of images that could not be captured with a traditional camera. Non-linear filtering techniques like bilateral filtering form a significant part of computational photography. These techniques have a wide range of applications, including High-Dynamic Range (HDR) imaging, Low-Light Enhanced (LLE) imaging, tone management and video enhancement. The high computational complexity of such multimedia processing applications necessitates fast hardware implementations to enable real-time processing. This paper describes a hardware implementation of a reconfigurable multi-application processor for computational photography.en_US
dc.description.sponsorshipFoxconn International Holdings Ltd.en_US
dc.language.isoen_US
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)en_US
dc.relation.isversionofhttp://dx.doi.org/10.1109/ISSCC.2013.6487683en_US
dc.rightsCreative Commons Attribution-Noncommercial-Share Alikeen_US
dc.rights.urihttp://creativecommons.org/licenses/by-nc-sa/4.0/en_US
dc.sourceChandrakasanen_US
dc.titleReconfigurable processor for energy-scalable computational photographyen_US
dc.typeArticleen_US
dc.identifier.citationRithe, R., P. Raina, N. Ickes, S. V. Tenneti, and A. P. Chandrakasan. “Reconfigurable Processor for Energy-Scalable Computational Photography.” 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers (February 2013).en_US
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Scienceen_US
dc.contributor.departmentMassachusetts Institute of Technology. Microsystems Technology Laboratoriesen_US
dc.contributor.approverChandrakasan, Anantha P.en_US
dc.contributor.mitauthorRithe, Rahulen_US
dc.contributor.mitauthorRaina, Priyankaen_US
dc.contributor.mitauthorChandrakasan, Anantha P.en_US
dc.contributor.mitauthorIckes, Nathan J.en_US
dc.relation.journal2013 IEEE International Solid-State Circuits Conference Digest of Technical Papersen_US
dc.eprint.versionAuthor's final manuscripten_US
dc.type.urihttp://purl.org/eprint/type/ConferencePaperen_US
eprint.statushttp://purl.org/eprint/status/NonPeerRevieweden_US
dspace.orderedauthorsRithe, R.; Raina, P.; Ickes, N.; Tenneti, S. V.; Chandrakasan, A. P.en_US
dc.identifier.orcidhttps://orcid.org/0000-0002-7418-0994
dc.identifier.orcidhttps://orcid.org/0000-0002-5977-2748
mit.licenseOPEN_ACCESS_POLICYen_US
mit.metadata.statusComplete


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