The design and implementation of a new wide-range frequency detector

Abstract

In this thesis, I designed and implemented a wide range frequency detector for use in clock recovery and data retiming applications. The new detector works in conjunction with the existing "mid-range" frequency detector to accurately lock the VCO to the incoming data rate. The new detector consists of two halves: one to detect when the VCO is too fast, and one to detect when the VCO is too slow. The design and analysis of the new frequency detectors, in addition to a method for integrating it with the existing detector, is discussed. Simulation data of the new and original frequency detectors are used to support the concepts upon which the new detector is designed. Some topics for future work are suggested at the end of this thesis.