dc.contributor.advisor | Eugene A. Fitzgerald. | en_US |
dc.contributor.author | Ting, Steve M. (Steve Ming), 1973- | en_US |
dc.contributor.other | Massachusetts Institute of Technology. Dept. of Materials Science and Engineering. | en_US |
dc.date.accessioned | 2005-08-22T19:07:52Z | |
dc.date.available | 2005-08-22T19:07:52Z | |
dc.date.copyright | 1999 | en_US |
dc.date.issued | 1999 | en_US |
dc.identifier.uri | http://hdl.handle.net/1721.1/9537 | |
dc.description | Thesis (Ph.D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, 1999. | en_US |
dc.description | Includes bibliographical references (p. 145-152). | en_US |
dc.description.statementofresponsibility | by Steve M. Ting. | en_US |
dc.format.extent | 152 p. | en_US |
dc.format.extent | 11497447 bytes | |
dc.format.extent | 11497203 bytes | |
dc.format.mimetype | application/pdf | |
dc.format.mimetype | application/pdf | |
dc.language.iso | eng | en_US |
dc.publisher | Massachusetts Institute of Technology | en_US |
dc.rights | M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. | en_US |
dc.rights.uri | http://dspace.mit.edu/handle/1721.1/7582 | |
dc.subject | Materials Science and Engineering. | en_US |
dc.title | Monolithic integration of III-V semiconductor materials and devices with silicon | en_US |
dc.title.alternative | Monolithic integration of three-five semiconductor materials and devices with silicon | en_US |
dc.type | Thesis | en_US |
dc.description.degree | Ph.D. | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Department of Materials Science and Engineering | |
dc.identifier.oclc | 43917786 | en_US |
dc.audience.educationlevel | The realization of monolithic optical interconnects by integration of III-V materials with conventional Si circuitry has long been hindered by materials incompatibilities (i.e. lattice mismatch and heterovalent interface) and practical processing constraints ... | en_US |