Power processing and active protection for photovoltaic energy extraction
Author(s)Chang, Arthur Hsu Chen
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science.
Steven B. Leeb.
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Solar photovoltaic power generation is a promising clean and renewable energy technology that can draw upon the planet's most abundant power source - the sun. However, relatively high levelized cost of energy (LCOE), the ratio of the total cost of ownership to the total energy extracted over the lifetime of the generation system, has limited the grid penetration of solar power. Mismatch loss remains an important issue to address in PV systems, and a solar power system can lose as much as 30% of its energy generation capability over a year due to mismatch. Maximum power point tracking (MPPT) using power electronics converters can increase the overall solar energy extraction efficiency and thus reduce the LCOE. Many power electronics solutions have been proposed at the module and submodule levels, which only partially addresses the mismatch problem. However, scaling the existing solutions to finer optimization granularity has been cost-prohibitive. In the first part of this thesis, a new cell-level strategy, termed diffusion charge redistribution (DCR), is proposed to fully recover mismatch loss. The proposed technique processes power by leveraging the intrinsic solar cell capacitance rather than relying on externally added intermediate energy storage in order to drastically reduce to the cost of MPPT while enabling the finest optimization granularity. Moreover, strings balanced by this technique exhibit power versus current curves that are convex, which simplifies the required MPPT algorithm. Cell-level power balancing may also ease the testing and binning criteria during manufacturing, which leads to additional cost savings. Differential power processing (DPP) is a key concept to further improve energy efficiency by minimizing the amount of power conversion. In the second part of this thesis, the concept of differential power processing is introduced to the proposed cell-level power balancing technique by rethinking the string-level power electronics architecture. This enhancement can improve the overall efficiency of DCR by more than 3.5% while permitting the use of a slower DCR switching frequency. It can also be applied to many other cascaded converter architectures to reduce insertion loss. In particular, the proposed differential DCR (dDCR) architecture simultaneously achieves maximum power point tracking without any external passive components at the cell-level, and maintains differential power processing with zero insertion loss. This is accomplished by decoupling the MPPT functional block from the DPP functional block. The new power optimization aims to not only maximize energy extraction from each solar cell but also minimize the amount of processed power. The new multi-variable optimization space for the dDCR topology is evaluated and shown to be convex, which simplifies the required optimization algorithm. The inverter represents a large part of the overall cost and is often the most failure-prone component in a photovoltaic power system. In order to improve the cost and reliability of a grid-tie inverter, switched-capacitor techniques are adopted to reduce the required capacitance and rated voltage of the dc-link capacitor. The proposed switched-capacitor energy buffer can improve capacitor energy utilization by more than four times for a system with a 10% peak-to-peak ripple specification, and enable the use of film or ceramic capacitors to prolong the system lifetime to over a hundred years. The third part of this thesis explores the SC energy buffer design space and examines tradeoffs regarding circuit topology, switching configuration, and control complexity. Practical applications require control schemes capable of handling source and load transients. A two-step control methodology that mitigates undesirable transient responses is proposed and demonstrated in simulation. Finally, dc power system architectures have attracted interest as a means for achieving high overall efficiency and facilitating integration of renewable and distributed energy sources, such as a photovoltaic system. However, to enable widespread adoption of dc systems, the reliability of fault protection and interruption capability is essential. A new dc breaker topology, called the series-connected Z-source circuit breaker, is introduced to minimize the reflected fault current drawn from a source while retaining a common return ground path. Analogous in some respects to an ac thermal-magnetic breaker, the proposed Z-source breaker can be designed for considerations affecting both rate of fault current rise and absolute fault current level. The proposed manual tripping mechanism also enables protection against both instantaneous large surges in current and longer-term over-current conditions.
Thesis: Ph. D., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2015.Cataloged from PDF version of thesis.Includes bibliographical references (pages 203-206).
DepartmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Massachusetts Institute of Technology
Electrical Engineering and Computer Science.