MIT Libraries logoDSpace@MIT

MIT
View Item 
  • DSpace@MIT Home
  • MIT Libraries
  • MIT Theses
  • Doctoral Theses
  • View Item
  • DSpace@MIT Home
  • MIT Libraries
  • MIT Theses
  • Doctoral Theses
  • View Item
JavaScript is disabled for your browser. Some features of this site may not work without it.

Processing technology for high quality AlGaN/GaN MOSHEMT interfaces

Author(s)
Saadat, Omair I
Thumbnail
DownloadFull printable version (25.43Mb)
Other Contributors
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science.
Advisor
Tomis Palacios.
Terms of use
M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582
Metadata
Show full item record
Abstract
Gallium Nitride (GaN) based high electron mobility transistors (HEMTs) are very promising for applications requiring high power and high operating frequencies due to its intrinsic material properties like the high electron mobility, large critical electric field and large carrier concentration. For power switching applications, it is necessary to lower gate leakage by introducing a gate insulator between the gate metal and the AIGaN barrier. This thesis focuses on studying the impact of processing conditions on the quality of the gate stack of AIGaN/GaN based MISHEMTs. First, the role of mobile ions like sodium in impacting the threshold voltage of AIGaN/GaN MIS-HEMTs was studied. Characterization techniques like bias temperature stress (BTS) that were traditionally used for characterizing mobile ions in SiO₂/Si capacitors were adapted for AIGaN/GaN MISHEMTs. Next, the impact of fabricating Al₂O₃/AIGaN/GaN MISHEMTs by using a CMOS compatible gate first process flow vs an Au-contact based, liftoff oriented process flow was evaluated. The differences between capacitors and transistors fabricated by different process flows were evaluated by a combination of high bias capacitance-voltage (CV) and transient current-voltage (IV) measurements. Organic contamination from the ohmic first process flow was attributed as being the key cause of the superior interface for the AIGaN/GaN MISHEMT processed using a gate first process flow. Finally, the gate first process flow was used to fabricate additional AIGaN/GaN MISHEMTS in order to look at the impact of atomic layer deposition (ALD) nucleation layers, the AIN interlayer, annealing conditions and AIGaN oxidation on the quality of the gate stack.
Description
Thesis: Ph. D., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2015.
 
Cataloged from PDF version of thesis.
 
Includes bibliographical references (pages 120-126).
 
Date issued
2015
URI
http://hdl.handle.net/1721.1/97810
Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Publisher
Massachusetts Institute of Technology
Keywords
Electrical Engineering and Computer Science.

Collections
  • Doctoral Theses

Browse

All of DSpaceCommunities & CollectionsBy Issue DateAuthorsTitlesSubjectsThis CollectionBy Issue DateAuthorsTitlesSubjects

My Account

Login

Statistics

OA StatisticsStatistics by CountryStatistics by Department
MIT Libraries
PrivacyPermissionsAccessibilityContact us
MIT
Content created by the MIT Libraries, CC BY-NC unless otherwise noted. Notify us about copyright concerns.