Virtual ground reference buffer technique in switched-capacitor circuits

Abstract

The performance of switched-capacitor circuits depends highly on the op-amp specifications. In conventional designs, trade-offs in speed, noise, and settling accuracy make it difficult to implement power-efficient switched-capacitor circuits. The problem originates from the inverse relationship between the feedback factor and the signal gain. This thesis proposes the virtual ground reference buffer technique that enhances performance by improving the feedback factor of the op-amp without affecting signal gain. A key concept in the technique is the bootstrapping action of level-shifting buffers. It exploits op-amp-based circuits whose principles are very well understood and the design techniques are mature. The solution ultimately relaxes the required op-amp requirements including unity-gain bandwidth, noise, offset voltage and open-loop gain that would otherwise result in complex design and high power consumption. The concept is demonstrated in a 12-b 250MS/s pipelined ADC.