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Saman Amarasinghe. Gyurova, Yoana G Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science. Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science 2016-01-04T19:57:26Z 2016-01-04T19:57:26Z 2015 2015 http://hdl.handle.net/1721.1/100599 932129616 Thesis: M. Eng., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2015. This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections. Cataloged from student-submitted PDF version of thesis. Includes bibliographical references (pages 59-61). Lowering voltage and frequency guardbands of CPU, DRAM, cache, or interconnect lowers power and latency, but increases the risk of silent data corruptions in even formally verified hardware and software. Researchers have been developing systems that use unreliable hardware, combined with software checkers executed on reliable hardware, to gain high performance with no risk. Deterministic checkers for many important algorithms are asymptotically and practically more efficient than the original problem solvers, e.g. for systems of linear equations, satisfiability, linear programming, sorting, 3SUM, graph matching and others. Writing a correct checker is hard, since often intricate corner cases get overlooked. Our system, SOUNDCHECK, helps reduce burden on programmers by automatically proving soundness and completeness of checkers with bounded verification in the Sketch program synthesis language. Verified checkers are emitted as efficient C++ code and shown to have low overhead which results in a net performance improvement with no risk. by Yoana G. Gyurova. M.Eng. 61 pages eng Massachusetts Institute of Technology M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 Electrical Engineering and Computer Science. Efficient and proven verification of unreliable hardware executions of classic algorithms Thesis application/pdf false Publication unknown unknown <Publication xmlns="https://www.openaire.eu/cerif-profile/1.1/" id="7c6bca40-78ad-4a6d-b6b1-6215f87f8f7b"> <Type xmlns="https://www.openaire.eu/cerif-profile/vocab/COAR_Publication_Types">http://purl.org/coar/resource_type/c_1843</Type> <Language>eng</Language> <Title>Efficient and proven verification of unreliable hardware executions of classic algorithms</Title> <PublishedIn> <Publication> </Publication> </PublishedIn> <PublicationDate>2015</PublicationDate> <Authors> <Author> <DisplayName>Gyurova, Yoana G</DisplayName> <Affiliation> <OrgUnit> </OrgUnit> </Affiliation> </Author> </Authors> <Editors> </Editors> <Publishers> <Publisher> <DisplayName>Massachusetts Institute of Technology</DisplayName> <OrgUnit /> </Publisher> </Publishers> <License>http://dspace.mit.edu/handle/1721.1/7582</License> <Keyword>Electrical Engineering and Computer Science.</Keyword> <Abstract>Lowering voltage and frequency guardbands of CPU, DRAM, cache, or interconnect lowers power and latency, but increases the risk of silent data corruptions in even formally verified hardware and software. Researchers have been developing systems that use unreliable hardware, combined with software checkers executed on reliable hardware, to gain high performance with no risk. Deterministic checkers for many important algorithms are asymptotically and practically more efficient than the original problem solvers, e.g. for systems of linear equations, satisfiability, linear programming, sorting, 3SUM, graph matching and others. Writing a correct checker is hard, since often intricate corner cases get overlooked. Our system, SOUNDCHECK, helps reduce burden on programmers by automatically proving soundness and completeness of checkers with bounded verification in the Sketch program synthesis language. Verified checkers are emitted as efficient C++ code and shown to have low overhead which results in a net performance improvement with no risk.</Abstract> <Access xmlns="http://purl.org/coar/access_right" > </Access> </Publication>