<?xml version="1.0" encoding="UTF-8"?><?xml-stylesheet type="text/xsl" href="static/style.xsl"?><OAI-PMH xmlns="http://www.openarchives.org/OAI/2.0/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/ http://www.openarchives.org/OAI/2.0/OAI-PMH.xsd"><responseDate>2026-09-18T22:55:20Z</responseDate><request verb="GetRecord" identifier="oai:dspace.mit.edu:1721.1/105988" metadataPrefix="dim">https://dspace.mit.edu/server/oai/request</request><GetRecord><record><header><identifier>oai:dspace.mit.edu:1721.1/105988</identifier><datestamp>2026-06-06T00:55:26Z</datestamp><setSpec>com_1721.1_7582</setSpec><setSpec>com_1721.1_7581</setSpec><setSpec>col_1721.1_131023</setSpec></header><metadata><dim:dim xmlns:dim="http://www.dspace.org/xmlns/dspace/dim" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:doc="http://www.lyncode.com/xoai" xsi:schemaLocation="http://www.dspace.org/xmlns/dspace/dim http://www.dspace.org/schema/dim.xsd">
   <dim:field mdschema="dc" element="contributor" qualifier="advisor" lang="en_US">Gerald Jay Sussman.</dim:field>
   <dim:field mdschema="dc" element="contributor" qualifier="author" lang="en_US">Gordonson, Joshua Michael</dim:field>
   <dim:field mdschema="dc" element="contributor" qualifier="other" lang="en_US">Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science.</dim:field>
   <dim:field mdschema="dc" element="contributor" qualifier="department">Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="accessioned">2016-12-22T15:17:36Z</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="available">2016-12-22T15:17:36Z</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="copyright" lang="en_US">2015</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="issued" lang="en_US">2015</dim:field>
   <dim:field mdschema="dc" element="identifier" qualifier="uri">http://hdl.handle.net/1721.1/105988</dim:field>
   <dim:field mdschema="dc" element="identifier" qualifier="oclc" lang="en_US">965796157</dim:field>
   <dim:field mdschema="dc" element="description" lang="en_US">Thesis: M. Eng., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2015.</dim:field>
   <dim:field mdschema="dc" element="description" lang="en_US">This electronic version was submitted by the student author.  The certified thesis is available in the Institute Archives and Special Collections.</dim:field>
   <dim:field mdschema="dc" element="description" lang="en_US">Cataloged from student-submitted PDF version of thesis.</dim:field>
   <dim:field mdschema="dc" element="description" qualifier="abstract" lang="en_US">The hands-on side of electrical engineering is still taught using solderless breadboards. To lower the learning curve and improve the utility of solderless breadboards, I have designed and implemented a prototype that draws schematic diagrams of passive circuits that are built on a breadboard. The system reverse engineers circuits by means of a network sensing algorithm, which iteratively grounds and excites nodes with voltage sources, and subsequently measures the resulting currents and voltages in the network. Both a software simulation and a hardware implementation were built to test the network sensing algorithm. The sofware system is capable of reverse-engineering arbitrarily sized RLC networks with some caveats regarding high-q parallel RLC networks. The hardware system is able to accurately detect resistive and capacitive networks with eight nodes, though current hardware limitations significantly reduce the precision of measurment. The performance of the hardware system was analyzed and solutions to many of the measurement issues were found. A technique for surface-mount soldering breadboards to PCBs is presented in this thesis.</dim:field>
   <dim:field mdschema="dc" element="description" qualifier="statementofresponsibility" lang="en_US">by Joshua Michael Gordonson.</dim:field>
   <dim:field mdschema="dc" element="description" qualifier="degree" lang="en_US">M.Eng.</dim:field>
   <dim:field mdschema="dc" element="format" qualifier="extent" lang="en_US">63 pages</dim:field>
   <dim:field mdschema="dc" element="language" qualifier="iso" lang="en_US">eng</dim:field>
   <dim:field mdschema="dc" element="publisher" lang="en_US">Massachusetts Institute of Technology</dim:field>
   <dim:field mdschema="dc" element="rights" lang="en_US">M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.</dim:field>
   <dim:field mdschema="dc" element="rights" qualifier="uri" lang="en_US">http://dspace.mit.edu/handle/1721.1/7582</dim:field>
   <dim:field mdschema="dc" element="subject" lang="en_US">Electrical Engineering and Computer Science.</dim:field>
   <dim:field mdschema="dc" element="title" lang="en_US">Reverse-engineering RLC networks with in-circuit measurement</dim:field>
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   	&lt;Title>Reverse-engineering RLC networks with in-circuit measurement&lt;/Title>
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   	&lt;PublicationDate>2015&lt;/PublicationDate>
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        	&lt;DisplayName>Gordonson, Joshua Michael&lt;/DisplayName>
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    &lt;Keyword>Electrical Engineering and Computer Science.&lt;/Keyword>
   	&lt;Abstract>The hands-on side of electrical engineering is still taught using solderless breadboards. To lower the learning curve and improve the utility of solderless breadboards, I have designed and implemented a prototype that draws schematic diagrams of passive circuits that are built on a breadboard. The system reverse engineers circuits by means of a network sensing algorithm, which iteratively grounds and excites nodes with voltage sources, and subsequently measures the resulting currents and voltages in the network. Both a software simulation and a hardware implementation were built to test the network sensing algorithm. The sofware system is capable of reverse-engineering arbitrarily sized RLC networks with some caveats regarding high-q parallel RLC networks. The hardware system is able to accurately detect resistive and capacitive networks with eight nodes, though current hardware limitations significantly reduce the precision of measurment. The performance of the hardware system was analyzed and solutions to many of the measurement issues were found. A technique for surface-mount soldering breadboards to PCBs is presented in this thesis.&lt;/Abstract>
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