<?xml version="1.0" encoding="UTF-8"?><?xml-stylesheet type="text/xsl" href="static/style.xsl"?><OAI-PMH xmlns="http://www.openarchives.org/OAI/2.0/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/ http://www.openarchives.org/OAI/2.0/OAI-PMH.xsd"><responseDate>2026-09-19T00:58:24Z</responseDate><request verb="GetRecord" identifier="oai:dspace.mit.edu:1721.1/106382" metadataPrefix="dim">https://dspace.mit.edu/server/oai/request</request><GetRecord><record><header><identifier>oai:dspace.mit.edu:1721.1/106382</identifier><datestamp>2026-06-06T00:55:31Z</datestamp><setSpec>com_1721.1_7582</setSpec><setSpec>com_1721.1_7581</setSpec><setSpec>col_1721.1_131023</setSpec></header><metadata><dim:dim xmlns:dim="http://www.dspace.org/xmlns/dspace/dim" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:doc="http://www.lyncode.com/xoai" xsi:schemaLocation="http://www.dspace.org/xmlns/dspace/dim http://www.dspace.org/schema/dim.xsd">
   <dim:field mdschema="dc" element="contributor" qualifier="advisor" lang="en_US">Matei A. Zaharia.</dim:field>
   <dim:field mdschema="dc" element="contributor" qualifier="author" lang="en_US">Thomas, James J., M. Eng Massachusetts Institute of Technology</dim:field>
   <dim:field mdschema="dc" element="contributor" qualifier="other" lang="en_US">Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science.</dim:field>
   <dim:field mdschema="dc" element="contributor" qualifier="department">Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="accessioned">2017-01-12T18:18:32Z</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="available">2017-01-12T18:18:32Z</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="copyright" lang="en_US">2016</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="issued" lang="en_US">2016</dim:field>
   <dim:field mdschema="dc" element="identifier" qualifier="uri">http://hdl.handle.net/1721.1/106382</dim:field>
   <dim:field mdschema="dc" element="identifier" qualifier="oclc" lang="en_US">967658880</dim:field>
   <dim:field mdschema="dc" element="description" lang="en_US">Thesis: M. Eng., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2016.</dim:field>
   <dim:field mdschema="dc" element="description" lang="en_US">This electronic version was submitted by the student author.  The certified thesis is available in the Institute Archives and Special Collections.</dim:field>
   <dim:field mdschema="dc" element="description" lang="en_US">Cataloged from student-submitted PDF version of thesis.</dim:field>
   <dim:field mdschema="dc" element="description" lang="en_US">Includes bibliographical references (pages 43-46).</dim:field>
   <dim:field mdschema="dc" element="description" qualifier="abstract" lang="en_US">Modern hardware is difficult to use efficiently, requiring complex optimizations like vectorization, loop blocking and load balancing to get good performance. As a result, many widely used data processing systems fall well short of peak hardware performance. We have developed Weld, an intermediate language and runtime that can run data-parallel computations efficiently on modern hardware. The core of Weld is a novel intermediate language (IL) that is expressive enough to capture common data-parallel applications (e.g., SQL, graph analytics and machine learning) while being easy to parallelize on modern hardware, through the use of a simple "parallel builder" abstraction and nested parallel loops. Weld supports complex optimizations like vectorization and loop blocking, as well as a multicore CPU backend. Finally,Weld's runtime can to optimize across library functions used in the same program, enabling further speedups that are not possible with today's disjoint libraries. In this thesis, we describe the Weld IL and then turn to the multicore CPU backend, providing a theoretical analysis suggesting that it has low overheads and showing that microbenchmarks and real-word applications like TensorFlow have excellent multicore performance when ported to run on Weld.</dim:field>
   <dim:field mdschema="dc" element="description" qualifier="statementofresponsibility" lang="en_US">by James J. Thomas.</dim:field>
   <dim:field mdschema="dc" element="description" qualifier="degree" lang="en_US">M.Eng.</dim:field>
   <dim:field mdschema="dc" element="format" qualifier="extent" lang="en_US">46 pages</dim:field>
   <dim:field mdschema="dc" element="language" qualifier="iso" lang="en_US">eng</dim:field>
   <dim:field mdschema="dc" element="publisher" lang="en_US">Massachusetts Institute of Technology</dim:field>
   <dim:field mdschema="dc" element="rights" lang="en_US">M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.</dim:field>
   <dim:field mdschema="dc" element="rights" qualifier="uri" lang="en_US">http://dspace.mit.edu/handle/1721.1/7582</dim:field>
   <dim:field mdschema="dc" element="subject" lang="en_US">Electrical Engineering and Computer Science.</dim:field>
   <dim:field mdschema="dc" element="title" lang="en_US">Weld : fast data-parallel computation on modern hardware</dim:field>
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   	&lt;Title>Weld : fast data-parallel computation on modern hardware&lt;/Title>
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   	&lt;PublicationDate>2016&lt;/PublicationDate>
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        	&lt;DisplayName>Thomas, James J., M. Eng Massachusetts Institute of Technology&lt;/DisplayName>
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            &lt;DisplayName>Massachusetts Institute of Technology&lt;/DisplayName>
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    &lt;License>http://dspace.mit.edu/handle/1721.1/7582&lt;/License>
    &lt;Keyword>Electrical Engineering and Computer Science.&lt;/Keyword>
   	&lt;Abstract>Modern hardware is difficult to use efficiently, requiring complex optimizations like vectorization, loop blocking and load balancing to get good performance. As a result, many widely used data processing systems fall well short of peak hardware performance. We have developed Weld, an intermediate language and runtime that can run data-parallel computations efficiently on modern hardware. The core of Weld is a novel intermediate language (IL) that is expressive enough to capture common data-parallel applications (e.g., SQL, graph analytics and machine learning) while being easy to parallelize on modern hardware, through the use of a simple &amp;quot;parallel builder&amp;quot; abstraction and nested parallel loops. Weld supports complex optimizations like vectorization and loop blocking, as well as a multicore CPU backend. Finally,Weld&amp;apos;s runtime can to optimize across library functions used in the same program, enabling further speedups that are not possible with today&amp;apos;s disjoint libraries. In this thesis, we describe the Weld IL and then turn to the multicore CPU backend, providing a theoretical analysis suggesting that it has low overheads and showing that microbenchmarks and real-word applications like TensorFlow have excellent multicore performance when ported to run on Weld.&lt;/Abstract>
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