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Duane S. Boning. Chen, Hongge, Ph. D. Massachusetts Institute of Technology Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science. Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science 2017-10-18T15:09:41Z 2017-10-18T15:09:41Z 2017 2017 http://hdl.handle.net/1721.1/111911 1005259977 Thesis: S.M., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2017. Cataloged from PDF version of thesis. Includes bibliographical references (pages 89-96). In the competitive semiconductor manufacturing industry where large amounts of data are generated, data driven quality control technologies are gaining increasing importance. The primary goal of this thesis is to build machine learning models for variation analysis and yield improvement. In this thesis, we first propose a novel method to estimate and characterize spatial variations on dies or wafers. This new technique exploits recent developments in matrix completion, enabling estimation of spatial variation across wafers or dies with a small number of randomly picked sampling points while still achieving fairly high accuracy. This new approach can also be easily generalized, including for estimation of mixed spatial and structure or device type information. Then machine learning models for high yield and time varying semiconductor manufacturing processes are developed. Challenges include class imbalance, concept drift (temporal variation) and feature selection. Batch and online learning methods are introduced to overcome the class imbalance. Incremental learning frameworks are developed to handle concept drift and class imbalance simultaneously. We study the packaging and testing process in chip stack flash memory manufacturing as an application, and show the possibility of yield improvement with machine learning based classifiers detecting bad dies before packaging. Experimental results demonstrate significant yield improvement potential using real data from industry. Without concept drift, for stacks of eight dies, approximately 9% yield improvement can be achieved. In a longer period of time with realistic concept drift, our incremental learning approach achieves approximately 1.4% yield improvement in the eight die stack case and 3.4% in the sixteen die stack case. by Hongge Chen. S.M. 96 pages eng Massachusetts Institute of Technology MIT theses are protected by copyright. They may be viewed, downloaded, or printed from this source but further reproduction or distribution in any format is prohibited without written permission. http://dspace.mit.edu/handle/1721.1/7582 Electrical Engineering and Computer Science. Novel machine learning approaches for modeling variations in semiconductor manufacturing Thesis application/pdf false Publication unknown unknown <Publication xmlns="https://www.openaire.eu/cerif-profile/1.1/" id="860e15b5-a9d0-4c24-afd1-2a6f93febe06"> <Type xmlns="https://www.openaire.eu/cerif-profile/vocab/COAR_Publication_Types">http://purl.org/coar/resource_type/c_1843</Type> <Language>eng</Language> <Title>Novel machine learning approaches for modeling variations in semiconductor manufacturing</Title> <PublishedIn> <Publication> </Publication> </PublishedIn> <PublicationDate>2017</PublicationDate> <Authors> <Author> <DisplayName>Chen, Hongge, Ph. D. Massachusetts Institute of Technology</DisplayName> <Affiliation> <OrgUnit> </OrgUnit> </Affiliation> </Author> </Authors> <Editors> </Editors> <Publishers> <Publisher> <DisplayName>Massachusetts Institute of Technology</DisplayName> <OrgUnit /> </Publisher> </Publishers> <License>http://dspace.mit.edu/handle/1721.1/7582</License> <Keyword>Electrical Engineering and Computer Science.</Keyword> <Abstract>In the competitive semiconductor manufacturing industry where large amounts of data are generated, data driven quality control technologies are gaining increasing importance. The primary goal of this thesis is to build machine learning models for variation analysis and yield improvement. In this thesis, we first propose a novel method to estimate and characterize spatial variations on dies or wafers. This new technique exploits recent developments in matrix completion, enabling estimation of spatial variation across wafers or dies with a small number of randomly picked sampling points while still achieving fairly high accuracy. This new approach can also be easily generalized, including for estimation of mixed spatial and structure or device type information. Then machine learning models for high yield and time varying semiconductor manufacturing processes are developed. Challenges include class imbalance, concept drift (temporal variation) and feature selection. Batch and online learning methods are introduced to overcome the class imbalance. Incremental learning frameworks are developed to handle concept drift and class imbalance simultaneously. We study the packaging and testing process in chip stack flash memory manufacturing as an application, and show the possibility of yield improvement with machine learning based classifiers detecting bad dies before packaging. Experimental results demonstrate significant yield improvement potential using real data from industry. Without concept drift, for stacks of eight dies, approximately 9% yield improvement can be achieved. In a longer period of time with realistic concept drift, our incremental learning approach achieves approximately 1.4% yield improvement in the eight die stack case and 3.4% in the sixteen die stack case.</Abstract> <Access xmlns="http://purl.org/coar/access_right" > </Access> </Publication>