<?xml version="1.0" encoding="UTF-8"?><?xml-stylesheet type="text/xsl" href="static/style.xsl"?><OAI-PMH xmlns="http://www.openarchives.org/OAI/2.0/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/ http://www.openarchives.org/OAI/2.0/OAI-PMH.xsd"><responseDate>2026-09-18T23:01:35Z</responseDate><request verb="GetRecord" identifier="oai:dspace.mit.edu:1721.1/112030" metadataPrefix="dim">https://dspace.mit.edu/server/oai/request</request><GetRecord><record><header><identifier>oai:dspace.mit.edu:1721.1/112030</identifier><datestamp>2026-06-17T14:47:38Z</datestamp><setSpec>com_1721.1_7582</setSpec><setSpec>com_1721.1_7581</setSpec><setSpec>col_1721.1_131022</setSpec></header><metadata><dim:dim xmlns:dim="http://www.dspace.org/xmlns/dspace/dim" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:doc="http://www.lyncode.com/xoai" xsi:schemaLocation="http://www.dspace.org/xmlns/dspace/dim http://www.dspace.org/schema/dim.xsd">
   <dim:field mdschema="dc" element="contributor" qualifier="advisor" lang="en_US">Tomás Palacios.</dim:field>
   <dim:field mdschema="dc" element="contributor" qualifier="author" lang="en_US">Sun, Min, Ph. D. Massachusetts Institute of Technology</dim:field>
   <dim:field mdschema="dc" element="contributor" qualifier="other" lang="en_US">Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science.</dim:field>
   <dim:field mdschema="dc" element="contributor" qualifier="department">Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="accessioned">2017-10-30T15:28:26Z</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="available">2017-10-30T15:28:26Z</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="copyright" lang="en_US">2017</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="issued" lang="en_US">2017</dim:field>
   <dim:field mdschema="dc" element="identifier" qualifier="uri">http://hdl.handle.net/1721.1/112030</dim:field>
   <dim:field mdschema="dc" element="identifier" qualifier="oclc" lang="en_US">1006380529</dim:field>
   <dim:field mdschema="dc" element="description" lang="en_US">Thesis: Ph. D., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2017.</dim:field>
   <dim:field mdschema="dc" element="description" lang="en_US">Cataloged from PDF version of thesis.</dim:field>
   <dim:field mdschema="dc" element="description" lang="en_US">Includes bibliographical references (pages 141-151).</dim:field>
   <dim:field mdschema="dc" element="description" qualifier="abstract" lang="en_US">Lateral power devices based on AlGaN/GaN hetero-structures have achieved excellent performance in the medium power range applications. However for higher voltage higher current switches, a vertical structure is preferred since its die area does not depend on the breakdown voltage. This thesis studies vertical GaN power diodes and transistors grown on bulk GaN substrates. The first part of the thesis studies the PiN diode. Low p-GaN ohmic contact resistance is obtained through annealing in oxygen ambient. The breakdown voltage reaches 1200 V with optimized field plate design. The resistance components of the PiN diodes are also analyzed in this part of the thesis. The second half of the thesis presents a novel vertical power FinFET design with only n-GaN epi-layers. One of the key fabrication processes required for this device structure is to achieve a smooth vertical fin sidewall by combining dry/wet etch. The normally-off power FinFET demonstrates excellent performances without the need of p-GaN layer or material regrowth. With the optimization of edge termination structures, 800 V blocking voltage was achieved. A further reduction of on resistance is achieved by increasing the cap layer doping. Switching characteristics are investigated by capacitance measurements. The thesis concludes with the demonstration of spalling off the bulk GaN substrate after device fabrication. Thanks to the substrate spalling technology, the on resistance of the device can be further reduced and the bulk GaN substrate could possibly be reused to save cost.</dim:field>
   <dim:field mdschema="dc" element="description" qualifier="statementofresponsibility" lang="en_US">by Min Sun.</dim:field>
   <dim:field mdschema="dc" element="description" qualifier="degree" lang="en_US">Ph.D.</dim:field>
   <dim:field mdschema="dc" element="format" qualifier="extent" lang="en_US">151 pages</dim:field>
   <dim:field mdschema="dc" element="language" qualifier="iso" lang="en_US">eng</dim:field>
   <dim:field mdschema="dc" element="publisher" lang="en_US">Massachusetts Institute of Technology</dim:field>
   <dim:field mdschema="dc" element="rights" lang="en_US">MIT theses are protected by copyright. They may be viewed, downloaded, or printed from this source but further reproduction or distribution in any format is prohibited without written permission.</dim:field>
   <dim:field mdschema="dc" element="rights" qualifier="uri" lang="en_US">http://dspace.mit.edu/handle/1721.1/7582</dim:field>
   <dim:field mdschema="dc" element="subject" lang="en_US">Electrical Engineering and Computer Science.</dim:field>
   <dim:field mdschema="dc" element="title" lang="en_US">Vertical gallium nitride power devices on bulk native substrates</dim:field>
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   	&lt;Title>Vertical gallium nitride power devices on bulk native substrates&lt;/Title>
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   	&lt;PublicationDate>2017&lt;/PublicationDate>
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        	&lt;DisplayName>Sun, Min, Ph. D. Massachusetts Institute of Technology&lt;/DisplayName>
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   	&lt;Abstract>Lateral power devices based on AlGaN/GaN hetero-structures have achieved excellent performance in the medium power range applications. However for higher voltage higher current switches, a vertical structure is preferred since its die area does not depend on the breakdown voltage. This thesis studies vertical GaN power diodes and transistors grown on bulk GaN substrates. The first part of the thesis studies the PiN diode. Low p-GaN ohmic contact resistance is obtained through annealing in oxygen ambient. The breakdown voltage reaches 1200 V with optimized field plate design. The resistance components of the PiN diodes are also analyzed in this part of the thesis. The second half of the thesis presents a novel vertical power FinFET design with only n-GaN epi-layers. One of the key fabrication processes required for this device structure is to achieve a smooth vertical fin sidewall by combining dry/wet etch. The normally-off power FinFET demonstrates excellent performances without the need of p-GaN layer or material regrowth. With the optimization of edge termination structures, 800 V blocking voltage was achieved. A further reduction of on resistance is achieved by increasing the cap layer doping. Switching characteristics are investigated by capacitance measurements. The thesis concludes with the demonstration of spalling off the bulk GaN substrate after device fabrication. Thanks to the substrate spalling technology, the on resistance of the device can be further reduced and the bulk GaN substrate could possibly be reused to save cost.&lt;/Abstract>
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