<?xml version="1.0" encoding="UTF-8"?><?xml-stylesheet type="text/xsl" href="static/style.xsl"?><OAI-PMH xmlns="http://www.openarchives.org/OAI/2.0/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/ http://www.openarchives.org/OAI/2.0/OAI-PMH.xsd"><responseDate>2026-09-18T22:20:22Z</responseDate><request verb="GetRecord" identifier="oai:dspace.mit.edu:1721.1/119595" metadataPrefix="dim">https://dspace.mit.edu/server/oai/request</request><GetRecord><record><header><identifier>oai:dspace.mit.edu:1721.1/119595</identifier><datestamp>2026-06-06T00:56:25Z</datestamp><setSpec>com_1721.1_7582</setSpec><setSpec>com_1721.1_7581</setSpec><setSpec>col_1721.1_131023</setSpec></header><metadata><dim:dim xmlns:dim="http://www.dspace.org/xmlns/dspace/dim" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:doc="http://www.lyncode.com/xoai" xsi:schemaLocation="http://www.dspace.org/xmlns/dspace/dim http://www.dspace.org/schema/dim.xsd">
   <dim:field mdschema="dc" element="contributor" qualifier="advisor" lang="en_US">James L. Kirtley, Jr.</dim:field>
   <dim:field mdschema="dc" element="contributor" qualifier="author" lang="en_US">Overlin, Matthew Ryan</dim:field>
   <dim:field mdschema="dc" element="contributor" qualifier="other" lang="en_US">Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science.</dim:field>
   <dim:field mdschema="dc" element="contributor" qualifier="department">Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="accessioned">2018-12-11T21:07:47Z</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="available">2018-12-11T21:07:47Z</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="copyright" lang="en_US">2017</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="issued" lang="en_US">2017</dim:field>
   <dim:field mdschema="dc" element="identifier" qualifier="uri">http://hdl.handle.net/1721.1/119595</dim:field>
   <dim:field mdschema="dc" element="identifier" qualifier="oclc" lang="en_US">1076269704</dim:field>
   <dim:field mdschema="dc" element="description" lang="en_US">Thesis: M. Eng., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2017.</dim:field>
   <dim:field mdschema="dc" element="description" lang="en_US">Cataloged from PDF version of thesis.</dim:field>
   <dim:field mdschema="dc" element="description" lang="en_US">Includes bibliographical references (pages 149-152).</dim:field>
   <dim:field mdschema="dc" element="description" qualifier="abstract" lang="en_US">In this work, a real-time load flow solver that solves for the complex bus voltages in a 4-bus electrical network (with 1 bus as the swing/reference bus) was designed and implemented. Simple Distributed Generator (DG) models were written in C++, with a 3-phase inverter always as the last sub-system of each DG model. The inverter was implemented as a real-/reactive-power controller. Two nodes in the network were made to have adjustable real and reactive power. Real and reactive powers in the network, line impedances, and node connectivity were used to solve for bus voltages in a Gauss-Seidel Load Flow Solver (implemented in an intel MAX® 10 FPGA). The implementation was carried out assuming balanced operation at all of the nodes and a balanced network.</dim:field>
   <dim:field mdschema="dc" element="description" qualifier="statementofresponsibility" lang="en_US">by Matthew R. Overlin.</dim:field>
   <dim:field mdschema="dc" element="description" qualifier="degree" lang="en_US">M.Eng.</dim:field>
   <dim:field mdschema="dc" element="format" qualifier="extent" lang="en_US">152 pages</dim:field>
   <dim:field mdschema="dc" element="language" qualifier="iso" lang="en_US">eng</dim:field>
   <dim:field mdschema="dc" element="publisher" lang="en_US">Massachusetts Institute of Technology</dim:field>
   <dim:field mdschema="dc" element="rights" lang="en_US">MIT theses are protected by copyright. They may be viewed, downloaded, or printed from this source but further reproduction or distribution in any format is prohibited without written permission.</dim:field>
   <dim:field mdschema="dc" element="rights" qualifier="uri" lang="en_US">http://dspace.mit.edu/handle/1721.1/7582</dim:field>
   <dim:field mdschema="dc" element="subject" lang="en_US">Electrical Engineering and Computer Science.</dim:field>
   <dim:field mdschema="dc" element="title" lang="en_US">A modular real-time hardware-in-the-loop simulation environment for microgrids</dim:field>
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   	&lt;Title>A modular real-time hardware-in-the-loop simulation environment for microgrids&lt;/Title>
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   	&lt;PublicationDate>2017&lt;/PublicationDate>
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        	&lt;DisplayName>Overlin, Matthew Ryan&lt;/DisplayName>
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    &lt;Keyword>Electrical Engineering and Computer Science.&lt;/Keyword>
   	&lt;Abstract>In this work, a real-time load flow solver that solves for the complex bus voltages in a 4-bus electrical network (with 1 bus as the swing/reference bus) was designed and implemented. Simple Distributed Generator (DG) models were written in C++, with a 3-phase inverter always as the last sub-system of each DG model. The inverter was implemented as a real-/reactive-power controller. Two nodes in the network were made to have adjustable real and reactive power. Real and reactive powers in the network, line impedances, and node connectivity were used to solve for bus voltages in a Gauss-Seidel Load Flow Solver (implemented in an intel MAX® 10 FPGA). The implementation was carried out assuming balanced operation at all of the nodes and a balanced network.&lt;/Abstract>
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