2026-09-21T03:37:07Zhttps://dspace.mit.edu/server/oai/requestoai:dspace.mit.edu:1721.1/1227442026-06-17T14:43:44Zcom_1721.1_7582com_1721.1_7581col_1721.1_131022
Tomás Palacios.
Zubair, Ahmad,Ph.D.Massachusetts Institute of Technology.
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science.
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
2019-11-04T20:22:10Z
2019-11-04T20:22:10Z
2019
2019
https://hdl.handle.net/1721.1/122744
1124763417
Thesis: Ph. D., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2019
Cataloged from PDF version of thesis.
Includes bibliographical references (pages 208-221).
Si CMOS technology is approaching its limit to meet the demand for future data-intensive energy efficient ubiquitous electronics. Emerging materials (i.e. low dimensional nanomaterials, novel dielectric/ferroelectric materials) show great promise to overcome the limits of the Si CMOS technology for specific applications. This thesis studies the prospects of two different emerging materials system (the atomically thin two-dimensional materials and ferroelectric oxides) in energy efficient electronic devices for future Systems-on-a-Chip (SoC's) applications. As the channel length of transistors has shrunk over the years, short-channel effects have become a major limiting factor to transistor miniaturization. Atomically thin MoS₂ is an ideal semiconductor material for field-effect transistors (FETs) with sub-10-nm channel lengths.
We study the limit of channel length scaling in MoS₂ FET using the semiconducting-to-metallic phase transition of MoS₂ and demonstrate sub-10-nm channel-length transistor fabrication by directed self-assembly patterning of mono- and trilayer MoS₂ Novel device concepts based on quantum mechanical tunneling (i.e. inter-band tunneling, hot electron injection) and two-dimensional materials can overcome some of the limitations of conventional CMOS devices for both low power and high frequency. We demonstrate inter-band tunneling transistors with room temperature negative differential resistance using van der Waals heterostructure for low power applications. Moreover, we show vertical hot electron transistor (HET) utilizing tunneling injection of hot electrons, which may enable operation at frequencies beyond what Si CMOS can provide.
The integration of the a highly conductive ultra-thin (0.3 nm) monolayer graphene with a GaN platform by van der Waals interaction can simultaneously offer both scalability and high performance in ballistic HET. In the last part of the thesis, we discuss how the use of ferroelectric Hf 0₂ with conventional (i.e. Si, GaN, InGaAs) semiconductor as well as two-dimensional materials systems offers a new degree of freedom when designing novel electronic devices. We demonstrate that the integration of ferroelectric Hf0₂ can enable ultra-low power (MoS₂ FET with subthreshold swing less than 60 mV/decade) as well as, potentially, higher operating frequencies. Finally, we present a proposal for a new analog synaptic device using ferroelectric Hf0₂ for in-memory computation in future SoC platforms.
by Ahmad Zubair.
Ph.D.
Ph.D. Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science
221 pages
eng
Massachusetts Institute of Technology
MIT theses are protected by copyright. They may be viewed, downloaded, or printed from this source but further reproduction or distribution in any format is prohibited without written permission.
http://dspace.mit.edu/handle/1721.1/7582
Electrical Engineering and Computer Science.
Tunneling and ferroelectric based transistors for energy efficient electronics
Thesis
application/pdf
2019-11-04T20:22:09Z
Publication
Doctoral
EECS
unknown
unknown
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<Abstract>Si CMOS technology is approaching its limit to meet the demand for future data-intensive energy efficient ubiquitous electronics. Emerging materials (i.e. low dimensional nanomaterials, novel dielectric/ferroelectric materials) show great promise to overcome the limits of the Si CMOS technology for specific applications. This thesis studies the prospects of two different emerging materials system (the atomically thin two-dimensional materials and ferroelectric oxides) in energy efficient electronic devices for future Systems-on-a-Chip (SoC's) applications. As the channel length of transistors has shrunk over the years, short-channel effects have become a major limiting factor to transistor miniaturization. Atomically thin MoS₂ is an ideal semiconductor material for field-effect transistors (FETs) with sub-10-nm channel lengths.</Abstract>
<Abstract>We study the limit of channel length scaling in MoS₂ FET using the semiconducting-to-metallic phase transition of MoS₂ and demonstrate sub-10-nm channel-length transistor fabrication by directed self-assembly patterning of mono- and trilayer MoS₂ Novel device concepts based on quantum mechanical tunneling (i.e. inter-band tunneling, hot electron injection) and two-dimensional materials can overcome some of the limitations of conventional CMOS devices for both low power and high frequency. We demonstrate inter-band tunneling transistors with room temperature negative differential resistance using van der Waals heterostructure for low power applications. Moreover, we show vertical hot electron transistor (HET) utilizing tunneling injection of hot electrons, which may enable operation at frequencies beyond what Si CMOS can provide.</Abstract>
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