<?xml version="1.0" encoding="UTF-8"?><?xml-stylesheet type="text/xsl" href="static/style.xsl"?><OAI-PMH xmlns="http://www.openarchives.org/OAI/2.0/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/ http://www.openarchives.org/OAI/2.0/OAI-PMH.xsd"><responseDate>2026-09-19T14:47:46Z</responseDate><request verb="GetRecord" identifier="oai:dspace.mit.edu:1721.1/129919" metadataPrefix="dim">https://dspace.mit.edu/server/oai/request</request><GetRecord><record><header><identifier>oai:dspace.mit.edu:1721.1/129919</identifier><datestamp>2026-06-06T00:56:18Z</datestamp><setSpec>com_1721.1_7582</setSpec><setSpec>com_1721.1_7581</setSpec><setSpec>col_1721.1_131023</setSpec></header><metadata><dim:dim xmlns:dim="http://www.dspace.org/xmlns/dspace/dim" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:doc="http://www.lyncode.com/xoai" xsi:schemaLocation="http://www.dspace.org/xmlns/dspace/dim http://www.dspace.org/schema/dim.xsd">
   <dim:field mdschema="dc" element="contributor" qualifier="advisor" lang="en_US">Saman Amarasinghe.</dim:field>
   <dim:field mdschema="dc" element="contributor" qualifier="author" lang="en_US">Mueller, Suzanne A.</dim:field>
   <dim:field mdschema="dc" element="contributor" qualifier="other" lang="en_US">Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science.</dim:field>
   <dim:field mdschema="dc" element="contributor" qualifier="department" lang="en_US">Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="accessioned">2021-02-19T20:56:56Z</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="available">2021-02-19T20:56:56Z</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="copyright" lang="en_US">2020</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="issued" lang="en_US">2020</dim:field>
   <dim:field mdschema="dc" element="identifier" qualifier="uri">https://hdl.handle.net/1721.1/129919</dim:field>
   <dim:field mdschema="dc" element="identifier" qualifier="oclc" lang="en_US">1237530529</dim:field>
   <dim:field mdschema="dc" element="description" lang="en_US">Thesis: M. Eng., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, February, 2020</dim:field>
   <dim:field mdschema="dc" element="description" lang="en_US">Cataloged from student-submitted PDF of thesis.</dim:field>
   <dim:field mdschema="dc" element="description" lang="en_US">Includes bibliographical references (pages 89-90).</dim:field>
   <dim:field mdschema="dc" element="description" qualifier="abstract" lang="en_US">The current state of the art for transposing sparse tensors involves converting the sparse tensor into a list of coordinates, sorting the list of coordinates and finally packing the list of coordinates into the desired sparse tensor format. This thesis explores the potential for faster methodologies. Its main contributions are an algorithm that exploits partial sortedness to minimize sorting passes and an implementation that demonstrates that this transposition algorithm is competitive with state of the art. In particular the algorithm takes advantage of the ordering that already exists to apply selective sorting passes and thereby reduce the amount of work that needs to be done to reorder the tensor.</dim:field>
   <dim:field mdschema="dc" element="description" qualifier="statementofresponsibility" lang="en_US">by Suzanne A. Mueller.</dim:field>
   <dim:field mdschema="dc" element="description" qualifier="degree" lang="en_US">M.Eng.</dim:field>
   <dim:field mdschema="dc" element="description" qualifier="collection" lang="en_US">M.Eng. Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science</dim:field>
   <dim:field mdschema="dc" element="format" qualifier="extent" lang="en_US">90 pages</dim:field>
   <dim:field mdschema="dc" element="language" qualifier="iso" lang="en_US">eng</dim:field>
   <dim:field mdschema="dc" element="publisher" lang="en_US">Massachusetts Institute of Technology</dim:field>
   <dim:field mdschema="dc" element="rights" lang="en_US">MIT theses may be protected by copyright. Please reuse MIT thesis content according to the MIT Libraries Permissions Policy, which is available through the URL provided.</dim:field>
   <dim:field mdschema="dc" element="rights" qualifier="uri" lang="en_US">http://dspace.mit.edu/handle/1721.1/7582</dim:field>
   <dim:field mdschema="dc" element="subject" lang="en_US">Electrical Engineering and Computer Science.</dim:field>
   <dim:field mdschema="dc" element="title" lang="en_US">Sparse tensor transpositions in the tensor algebra compiler</dim:field>
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   <dim:field mdschema="mit" element="thesis" qualifier="degree" lang="en_US">Master</dim:field>
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   	&lt;Title>Sparse tensor transpositions in the tensor algebra compiler&lt;/Title>
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   	&lt;PublicationDate>2020&lt;/PublicationDate>
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            &lt;DisplayName>Massachusetts Institute of Technology&lt;/DisplayName>
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    &lt;Keyword>Electrical Engineering and Computer Science.&lt;/Keyword>
   	&lt;Abstract>The current state of the art for transposing sparse tensors involves converting the sparse tensor into a list of coordinates, sorting the list of coordinates and finally packing the list of coordinates into the desired sparse tensor format. This thesis explores the potential for faster methodologies. Its main contributions are an algorithm that exploits partial sortedness to minimize sorting passes and an implementation that demonstrates that this transposition algorithm is competitive with state of the art. In particular the algorithm takes advantage of the ordering that already exists to apply selective sorting passes and thereby reduce the amount of work that needs to be done to reorder the tensor.&lt;/Abstract>
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