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oai:dspace.mit.edu:1721.1/1390352022-01-15T03:29:30Zcom_1721.1_7582com_1721.1_7581col_1721.1_131023

Perreault, David J. Gubbins, David Persad, Ashisha N. Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science 2022-01-14T14:45:57Z 2022-01-14T14:45:57Z 2021-06 2021-06-17T20:14:02.629Z https://hdl.handle.net/1721.1/139035 Thermoelectric coolers (TECs) are solid state devices that use the Peltier effect to provide heating or cooling for an enclosed area when a voltage is applied. In order to both heat and cool, a bidirectional current must be supplied to the TEC. Therefore, a driver circuit is needed to supply the TEC with this bidirectional input. This thesis explores a design for an ultra-compact driver for a TEC that allows the system to quickly respond to disturbances, and efficiently maintain a precise temperature. Existing integrated TEC driver products currently do not meet the design targets set in this thesis. The products only operate up to 2 MHz frequency, are less than 90 % efficient, and are quite large. This motivates the design of an improved TEC driver. This thesis provides an investigation into a peak current mode controlled TEC driver architecture that operates at 5 MHz with a 2.7-5.5 V input, and supplies ± 1.5 A to the TEC. This TEC driver was targeted to achieve a 95 % efficiency, and will be incorporated with other circuity as part of an ultra-compact integrated circuit (IC) package design. After exploring various architectures, a peak current mode dual buck Hbridge TEC driver comprising the architectural blocks of a gate drive circuit, outer voltage loop, and inner current loop was designed. This design ensures that the targets of small size, high efficiency and stability are met. The experimental results, along with analysis and simulation of the design presented in this thesis demonstrate that this architecture can be used in TEC driver applications, and shows great promise for use in other applications due to its size and efficiency. M.Eng. Massachusetts Institute of Technology In Copyright - Educational Use Permitted Copyright MIT http://rightsstatements.org/page/InC-EDU/1.0/ Peak Current Mode Driver for Thermoelectric Cooler Thesis application/pdf Master Master of Engineering in Electrical Engineering and Computer Science Publication unknown unknown <Publication xmlns="https://www.openaire.eu/cerif-profile/1.1/" id="8e8ddd1d-90cf-4d37-95b6-31442e617c4d"> <Type xmlns="https://www.openaire.eu/cerif-profile/vocab/COAR_Publication_Types">http://purl.org/coar/resource_type/c_1843</Type> <Title>Peak Current Mode Driver for Thermoelectric Cooler</Title> <PublishedIn> <Publication> </Publication> </PublishedIn> <PublicationDate>2021-06</PublicationDate> <Authors> <Author> <DisplayName>Persad, Ashisha N.</DisplayName> <Affiliation> <OrgUnit> </OrgUnit> </Affiliation> </Author> </Authors> <Editors> </Editors> <Publishers> <Publisher> <DisplayName>Massachusetts Institute of Technology</DisplayName> <OrgUnit /> </Publisher> </Publishers> <License>http://rightsstatements.org/page/InC-EDU/1.0/</License> <Abstract>Thermoelectric coolers (TECs) are solid state devices that use the Peltier effect to provide heating or cooling for an enclosed area when a voltage is applied. In order to both heat and cool, a bidirectional current must be supplied to the TEC. Therefore, a driver circuit is needed to supply the TEC with this bidirectional input. This thesis explores a design for an ultra-compact driver for a TEC that allows the system to quickly respond to disturbances, and efficiently maintain a precise temperature. Existing integrated TEC driver products currently do not meet the design targets set in this thesis. The products only operate up to 2 MHz frequency, are less than 90 % efficient, and are quite large. This motivates the design of an improved TEC driver. This thesis provides an investigation into a peak current mode controlled TEC driver architecture that operates at 5 MHz with a 2.7-5.5 V input, and supplies ± 1.5 A to the TEC. This TEC driver was targeted to achieve a 95 % efficiency, and will be incorporated with other circuity as part of an ultra-compact integrated circuit (IC) package design. After exploring various architectures, a peak current mode dual buck Hbridge TEC driver comprising the architectural blocks of a gate drive circuit, outer voltage loop, and inner current loop was designed. This design ensures that the targets of small size, high efficiency and stability are met. The experimental results, along with analysis and simulation of the design presented in this thesis demonstrate that this architecture can be used in TEC driver applications, and shows great promise for use in other applications due to its size and efficiency.</Abstract> <Access xmlns="http://purl.org/coar/access_right" > </Access> </Publication>