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   <dim:field mdschema="dc" element="contributor" qualifier="advisor">Kim, Jeehwan</dim:field>
   <dim:field mdschema="dc" element="contributor" qualifier="author">Choi, Chanyeol</dim:field>
   <dim:field mdschema="dc" element="contributor" qualifier="department">Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="accessioned">2022-02-07T15:26:36Z</dim:field>
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   <dim:field mdschema="dc" element="date" qualifier="issued">2021-09</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="submitted">2021-09-21T19:30:57.615Z</dim:field>
   <dim:field mdschema="dc" element="identifier" qualifier="uri">https://hdl.handle.net/1721.1/140143</dim:field>
   <dim:field mdschema="dc" element="description" qualifier="abstract">In the field of artificial intelligence hardware, a memristor has been proposed as an artificial synapse for creating neuromorphic computer applications. Changes in weight values in the form of conductance must be identifiable and uniform to train a neural network in memristor arrays. Because of the high mobility of metal ions in the Si switching medium, an electrochemical metallization (ECM) memory has shown a high analogue switching capacity. However, switching unpredictability is caused by the extreme stochasticity of ion transport. I demonstrated a Si memristor with alloyed conduction channels that works dependably and enables large-scale crossbar array deployment. In addition, heterogeneously integrated neuromorphic chips have been developed to allow physically reconfigurable neuromorphic computing. This thesis examines alloyed metal-based silicon memristors and stackable neuromorphic chips with heterogeneous integration for reliable and reconfigurable neuromorphic computing.</dim:field>
   <dim:field mdschema="dc" element="description" qualifier="degree">Ph.D.</dim:field>
   <dim:field mdschema="dc" element="publisher">Massachusetts Institute of Technology</dim:field>
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   <dim:field mdschema="dc" element="rights">Copyright MIT</dim:field>
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   <dim:field mdschema="dc" element="title">Memristor-based AI Hardware for Reliable and Reconfigurable Neuromorphic Computing</dim:field>
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   <dim:field mdschema="mit" element="thesis" qualifier="degree">Doctoral</dim:field>
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   	&lt;Title>Memristor-based AI Hardware for Reliable and Reconfigurable Neuromorphic Computing&lt;/Title>
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   	&lt;PublicationDate>2021-09&lt;/PublicationDate>
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        	&lt;DisplayName>Choi, Chanyeol&lt;/DisplayName>
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            &lt;DisplayName>Massachusetts Institute of Technology&lt;/DisplayName>
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   	&lt;Abstract>In the field of artificial intelligence hardware, a memristor has been proposed as an artificial synapse for creating neuromorphic computer applications. Changes in weight values in the form of conductance must be identifiable and uniform to train a neural network in memristor arrays. Because of the high mobility of metal ions in the Si switching medium, an electrochemical metallization (ECM) memory has shown a high analogue switching capacity. However, switching unpredictability is caused by the extreme stochasticity of ion transport. I demonstrated a Si memristor with alloyed conduction channels that works dependably and enables large-scale crossbar array deployment. In addition, heterogeneously integrated neuromorphic chips have been developed to allow physically reconfigurable neuromorphic computing. This thesis examines alloyed metal-based silicon memristors and stackable neuromorphic chips with heterogeneous integration for reliable and reconfigurable neuromorphic computing.&lt;/Abstract>
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