2026-09-19T15:04:05Zhttps://dspace.mit.edu/server/oai/requestoai:dspace.mit.edu:1721.1/1432252022-06-16T03:15:55Zcom_1721.1_7582com_1721.1_7581col_1721.1_131023
Yun, Ruida
Perreault, David
Hidalgo, Nancy Yahel
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
2022-06-15T13:04:52Z
2022-06-15T13:04:52Z
2022-02
2022-02-22T18:32:15.024Z
https://hdl.handle.net/1721.1/143225
A Basic, Isolated, Half-Bridge Silicon Carbide Gate Driver was designed and validated using Cadence and SPICE. The architectures of similar gate drivers were studied and simplified to reduce the total area of the gate driver. The fabrication process was also carefully selected to minimize the total area. The gate driver architecture consisted of various analog and mixed signal subcircuits including floating voltage rail generators, inverter chains, and an on-off key receiver among others. Extensive simulations were performed in SPICE and Cadence to analyze the gate driver behavior for various temperature conditions, operating voltages, load conditions, and process corners. The final product was able to drive 6 amps of peak output current, with 10 nanoseconds of propagation delay, and with a 2 milliamp quiescent current.
M.Eng.
Massachusetts Institute of Technology
In Copyright - Educational Use Permitted
Copyright MIT
http://rightsstatements.org/page/InC-EDU/1.0/
A Basic Isolated Half-Bridge Silicon Carbide Gate Driver for Electric and Hybrid Electric Vehicles
Thesis
application/pdf
Master
Master of Engineering in Electrical Engineering and Computer Science
Publication
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unknown
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<Abstract>A Basic, Isolated, Half-Bridge Silicon Carbide Gate Driver was designed and validated using Cadence and SPICE. The architectures of similar gate drivers were studied and simplified to reduce the total area of the gate driver. The fabrication process was also carefully selected to minimize the total area. The gate driver architecture consisted of various analog and mixed signal subcircuits including floating voltage rail generators, inverter chains, and an on-off key receiver among others. Extensive simulations were performed in SPICE and Cadence to analyze the gate driver behavior for various temperature conditions, operating voltages, load conditions, and process corners. The final product was able to drive 6 amps of peak output current, with 10 nanoseconds of propagation delay, and with a 2 milliamp quiescent current.</Abstract>
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