2026-09-19T07:43:35Zhttps://dspace.mit.edu/server/oai/requestoai:dspace.mit.edu:1721.1/1473612023-01-20T03:17:40Zcom_1721.1_7582com_1721.1_7581col_1721.1_131022
Palacios, Tomás
Yuan, Mengyang
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
2023-01-19T18:48:09Z
2023-01-19T18:48:09Z
2022-09
2022-10-19T19:11:48.970Z
https://hdl.handle.net/1721.1/147361
https://orcid.org/0000-0003-2615-7623
Gallium nitride is a promising candidate for harsh environment electronics, thanks to its excellent material properties, which have given rise to high-performance (room temperature) transistors for RF, power, MEMS, and mixed-signal applications. Previous works on high-temperature (HT) electronics have been typically limited to two aspects, namely, the high-temperature robustness of discrete transistors and basic circuit building blocks, which are mainly combinational logic. While these studies offer a strong indication of the potential of GaN transistor technology for HT applications, the development of HT (500 °C) GaN-ICs is still at its early stage due to the low degree of complexity and integration demonstrated so far.
Major challenges in the realization of GaN HT-robust sequential logic circuits or more complex systems is the lack of a scalable technology.
This thesis aims to advance the integration technology of GaN HT electronics by demonstrating a comprehensive HT (500°C) enhancement-mode (E-mode) GaN-on-Si technology from device to circuit perspectives: (1) a scalable device technology based on p-GaN-gate AlGaN/GaN HEMTs with high uniformity, which is optimized for HT operation and demonstrated to offer robust performance at least up to 500 °C with the help of in-house developed packaging technology and characterization platform, (2) compact modeling of monolithically integrated enhancement/depletion-mode HEMTs up to 500 °C HEMTs, (3) robustness-driven circuit design based on GaN technology, (4) demonstration of GaN-based combinational and sequential building blocks including inverter, NAND, NOR, ring oscillators, ROM, SRAM, D Latch, D Flip-Flop operational up to 500 °C.
Ph.D.
Massachusetts Institute of Technology
In Copyright - Educational Use Permitted
Copyright MIT
http://rightsstatements.org/page/InC-EDU/1.0/
GaN Electronics for High-Temperature Applications
Thesis
application/pdf
Doctoral
Doctor of Philosophy
Publication
unknown
unknown
<Publication xmlns="https://www.openaire.eu/cerif-profile/1.1/" id="b8ec012d-cc9c-4451-bf41-65686a89eff7">
<Type xmlns="https://www.openaire.eu/cerif-profile/vocab/COAR_Publication_Types">http://purl.org/coar/resource_type/c_1843</Type>
<Title>GaN Electronics for High-Temperature Applications</Title>
<PublishedIn>
<Publication>
</Publication>
</PublishedIn>
<PublicationDate>2022-09</PublicationDate>
<Authors>
<Author>
<DisplayName>Yuan, Mengyang</DisplayName>
<Affiliation>
<OrgUnit>
</OrgUnit>
</Affiliation>
</Author>
</Authors>
<Editors>
</Editors>
<Publishers>
<Publisher>
<DisplayName>Massachusetts Institute of Technology</DisplayName>
<OrgUnit />
</Publisher>
</Publishers>
<License>http://rightsstatements.org/page/InC-EDU/1.0/</License>
<Abstract>Gallium nitride is a promising candidate for harsh environment electronics, thanks to its excellent material properties, which have given rise to high-performance (room temperature) transistors for RF, power, MEMS, and mixed-signal applications. Previous works on high-temperature (HT) electronics have been typically limited to two aspects, namely, the high-temperature robustness of discrete transistors and basic circuit building blocks, which are mainly combinational logic. While these studies offer a strong indication of the potential of GaN transistor technology for HT applications, the development of HT (500 °C) GaN-ICs is still at its early stage due to the low degree of complexity and integration demonstrated so far.
Major challenges in the realization of GaN HT-robust sequential logic circuits or more complex systems is the lack of a scalable technology.
This thesis aims to advance the integration technology of GaN HT electronics by demonstrating a comprehensive HT (500°C) enhancement-mode (E-mode) GaN-on-Si technology from device to circuit perspectives: (1) a scalable device technology based on p-GaN-gate AlGaN/GaN HEMTs with high uniformity, which is optimized for HT operation and demonstrated to offer robust performance at least up to 500 °C with the help of in-house developed packaging technology and characterization platform, (2) compact modeling of monolithically integrated enhancement/depletion-mode HEMTs up to 500 °C HEMTs, (3) robustness-driven circuit design based on GaN technology, (4) demonstration of GaN-based combinational and sequential building blocks including inverter, NAND, NOR, ring oscillators, ROM, SRAM, D Latch, D Flip-Flop operational up to 500 °C.</Abstract>
<Access xmlns="http://purl.org/coar/access_right"
>
</Access>
</Publication>