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Jim Burns and Rafael Reif. Salinas, Erica M. (Erica Marie), 1980- Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science 2005-05-17T14:56:09Z 2005-05-17T14:56:09Z 2003 2004 http://hdl.handle.net/1721.1/16687 57175032 Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, February 2004. Includes bibliographical references (leaf 35). This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections. As the semi-conductor industry moves towards deep sub-micron designs, efficiency of chip-wide communication is becoming the limiting factor on system performance. One globally distributed signal with significant effect on system performance is the clock signal. In this paper utilization of three-dimensional circuit integration to reduce the negative effects of technology scaling on clock signal distribution is investigated. A design is proposed that removes the clock distribution network from the same active plane as the logical functions of the system and places them on a separate, but electrically connected active plane. Proposed benefits of a three-dimensional distribution network are the reduction of global skew, greater signal integrity, and an increase in system density. All aspects of the design process are detailed including methodology, simulation tools and verification, interconnect and repeater design, the three-dimensional integration process, and the overall predicted system benefits. by Erica M. Salinas. M.Eng. 37 leaves 371157 bytes 430737 bytes application/pdf application/pdf eng Massachusetts Institute of Technology M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 Electrical Engineering and Computer Science. Application of three-dimensional circuit integration to global clock distribution Thesis application/pdf false Publication unknown unknown <Publication xmlns="https://www.openaire.eu/cerif-profile/1.1/" id="4edac99e-ea12-4174-acc4-bd4b71ad2d59"> <Type xmlns="https://www.openaire.eu/cerif-profile/vocab/COAR_Publication_Types">http://purl.org/coar/resource_type/c_1843</Type> <Language>eng</Language> <Title>Application of three-dimensional circuit integration to global clock distribution</Title> <PublishedIn> <Publication> </Publication> </PublishedIn> <PublicationDate>2004</PublicationDate> <Authors> <Author> <DisplayName>Salinas, Erica M. (Erica Marie), 1980-</DisplayName> <Affiliation> <OrgUnit> </OrgUnit> </Affiliation> </Author> </Authors> <Editors> </Editors> <Publishers> <Publisher> <DisplayName>Massachusetts Institute of Technology</DisplayName> <OrgUnit /> </Publisher> </Publishers> <License>http://dspace.mit.edu/handle/1721.1/7582</License> <Keyword>Electrical Engineering and Computer Science.</Keyword> <Abstract>As the semi-conductor industry moves towards deep sub-micron designs, efficiency of chip-wide communication is becoming the limiting factor on system performance. One globally distributed signal with significant effect on system performance is the clock signal. In this paper utilization of three-dimensional circuit integration to reduce the negative effects of technology scaling on clock signal distribution is investigated. A design is proposed that removes the clock distribution network from the same active plane as the logical functions of the system and places them on a separate, but electrically connected active plane. Proposed benefits of a three-dimensional distribution network are the reduction of global skew, greater signal integrity, and an increase in system density. All aspects of the design process are detailed including methodology, simulation tools and verification, interconnect and repeater design, the three-dimensional integration process, and the overall predicted system benefits.</Abstract> <Access xmlns="http://purl.org/coar/access_right" > </Access> </Publication>