2026-09-19T19:07:23Zhttps://dspace.mit.edu/server/oai/requestoai:dspace.mit.edu:1721.1/168932022-01-13T07:54:29Zcom_1721.1_7582com_1721.1_7581col_1721.1_131023
Rahul Sarpeshkar.
Sit, Ji-Jon, 1975-
Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
2005-05-19T15:11:25Z
2005-05-19T15:11:25Z
2002
2002
http://hdl.handle.net/1721.1/16893
51979328
Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2002.
Includes bibliographical references (p. 74-75).
This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.
Logarithmic map circuits are useful in many applications that require non-linear signal compression, such as in speech recognition and cochlear implants. A logarithmic current-mode A/D converter with temperature compensation and automatic offset calibration is presented in this paper. It employs a dual-slope, auto-zeroing topology with a 60 dB dynamic range and 300 Hz sampling rate, for capturing the envelope of speech signals in a bionic ear. Fabricated in a 1.5 [mu]m process, the circuit consumes only 1 [mu]W of analog power and another 1 [mu]W of digital power, and can therefore run for over 50 years on just a couple of AA batteries. At the current level of power consumption, we have proven that this design is thermal-noise limited to a 6-bit precision, and higher precision is possible only if we expend more power. As such, it is already useful for cochlear implants, as deaf patients can only discriminate 1 dB out of a 30 dB dynamic range in the auditory nerve bundles. For the purpose of using this circuit in other applications, we conclude with several strategies that can increase the precision without hurting the power consumption.
by Ji-Jon Sit.
S.M.
91 p.
10351297 bytes
10351034 bytes
application/pdf
application/pdf
eng
Massachusetts Institute of Technology
M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.
http://dspace.mit.edu/handle/1721.1/7582
Electrical Engineering and Computer Science.
A low-power analog logarithmic map circuit with offset and temperature compensation for use in bionic ears
Thesis
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<Abstract>Logarithmic map circuits are useful in many applications that require non-linear signal compression, such as in speech recognition and cochlear implants. A logarithmic current-mode A/D converter with temperature compensation and automatic offset calibration is presented in this paper. It employs a dual-slope, auto-zeroing topology with a 60 dB dynamic range and 300 Hz sampling rate, for capturing the envelope of speech signals in a bionic ear. Fabricated in a 1.5 [mu]m process, the circuit consumes only 1 [mu]W of analog power and another 1 [mu]W of digital power, and can therefore run for over 50 years on just a couple of AA batteries. At the current level of power consumption, we have proven that this design is thermal-noise limited to a 6-bit precision, and higher precision is possible only if we expend more power. As such, it is already useful for cochlear implants, as deaf patients can only discriminate 1 dB out of a 30 dB dynamic range in the auditory nerve bundles. For the purpose of using this circuit in other applications, we conclude with several strategies that can increase the precision without hurting the power consumption.</Abstract>
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