2026-09-19T02:01:25Zhttps://dspace.mit.edu/server/oai/requestoai:dspace.mit.edu:1721.1/284472022-01-13T07:54:29Zcom_1721.1_7582com_1721.1_7581col_1721.1_131023
L. Rafael Reif.
Mitros, Piotr, 1979-
Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
2005-09-26T20:31:15Z
2005-09-26T20:31:15Z
2004
2004
http://hdl.handle.net/1721.1/28447
57016868
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2004.
Includes bibliographical references (p. 49-50).
This thesis presents a system for optimization of analog circuit topologies and component values. The topology is optimized using simulated annealing, while the component values are optimized using gradient descent. Local minima are avoided and constraints are kept through the use of coordinate transformations, as well as the use of default starting points for component values. The system is targeted for use in 3D integrated circuit design. The architecture is extendable, and is designed to eventually include capabilities for automated layout and mixed-signal design.
by Piotr Mitros.
M.Eng.
50 p.
1751877 bytes
1755745 bytes
application/pdf
application/pdf
en_US
Massachusetts Institute of Technology
M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.
http://dspace.mit.edu/handle/1721.1/7582
Electrical Engineering and Computer Science.
A framework for analog circuit optimization
Thesis
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