2026-09-19T20:44:08Zhttps://dspace.mit.edu/server/oai/requestoai:dspace.mit.edu:1721.1/333712022-01-13T07:54:29Zcom_1721.1_7582com_1721.1_7581col_1721.1_131023
Anant Agarwal.
Walker, Benjamin Philip Eugene Zaks
Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
2006-07-13T15:18:58Z
2006-07-13T15:18:58Z
2004
2004
http://hdl.handle.net/1721.1/33371
62522673
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2004.
Includes bibliographical references (p. 95-96).
The Raw microprocessor is a tiled architecture processor designed by the Computer Architecture Group at MIT. Raw was designed in part to be extremely good at performing streaming-type algorithms such as those found in wireless communications processing. This thesis describes the design and implementation of an interface between the Raw microprocessor and a modified 802.11a/b/g wireless access point. Combined with the Raw processor, this interface replaces a custom digital chip in the access point. The interface can be used with the Raw microprocessor to perform communications research, and as a system demonstrating Raw's capabilities. The interface has been built, tested, and functionally qualified.
by Benjamin Philip Eugene Zaks Walker.
M.Eng.
96 p.
3892796 bytes
3896740 bytes
application/pdf
application/pdf
eng
Massachusetts Institute of Technology
M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.
http://dspace.mit.edu/handle/1721.1/7582
Electrical Engineering and Computer Science.
A Raw processor interface to an 802.11b/g RF front end
Thesis
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