<?xml version="1.0" encoding="UTF-8"?><?xml-stylesheet type="text/xsl" href="static/style.xsl"?><OAI-PMH xmlns="http://www.openarchives.org/OAI/2.0/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/ http://www.openarchives.org/OAI/2.0/OAI-PMH.xsd"><responseDate>2026-09-19T08:04:45Z</responseDate><request verb="GetRecord" identifier="oai:dspace.mit.edu:1721.1/34808" metadataPrefix="dim">https://dspace.mit.edu/server/oai/request</request><GetRecord><record><header><identifier>oai:dspace.mit.edu:1721.1/34808</identifier><datestamp>2022-01-28T18:55:46Z</datestamp><setSpec>com_1721.1_7582</setSpec><setSpec>com_1721.1_7581</setSpec><setSpec>col_1721.1_131023</setSpec></header><metadata><dim:dim xmlns:dim="http://www.dspace.org/xmlns/dspace/dim" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:doc="http://www.lyncode.com/xoai" xsi:schemaLocation="http://www.dspace.org/xmlns/dspace/dim http://www.dspace.org/schema/dim.xsd">
   <dim:field mdschema="dc" element="contributor" qualifier="advisor" lang="en_US">Duane Boning and Sara Beckman.</dim:field>
   <dim:field mdschema="dc" element="contributor" qualifier="author" lang="en_US">Chandler, Thomas B. (Thomas Brian), 1970-</dim:field>
   <dim:field mdschema="dc" element="contributor" qualifier="other" lang="en_US">Leaders for Manufacturing Program.</dim:field>
   <dim:field mdschema="dc" element="contributor" qualifier="department" lang="en_US">Leaders for Manufacturing Program at MIT</dim:field>
   <dim:field mdschema="dc" element="contributor" qualifier="department">Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science</dim:field>
   <dim:field mdschema="dc" element="contributor" qualifier="department">Sloan School of Management</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="accessioned">2006-11-08T16:41:40Z</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="available">2006-11-08T16:41:40Z</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="copyright" lang="en_US">2004</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="issued" lang="en_US">2004</dim:field>
   <dim:field mdschema="dc" element="identifier" qualifier="uri">http://hdl.handle.net/1721.1/34808</dim:field>
   <dim:field mdschema="dc" element="identifier" qualifier="oclc" lang="en_US">59006555</dim:field>
   <dim:field mdschema="dc" element="description" lang="en_US">Thesis (M.B.A.)--Massachusetts Institute of Technology, Sloan School of Management; and, (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science; in conjunction with the Leaders for Manufacturing Program at MIT, 2004.</dim:field>
   <dim:field mdschema="dc" element="description" lang="en_US">Includes bibliographical references (p. 117-119).</dim:field>
   <dim:field mdschema="dc" element="description" qualifier="abstract" lang="en_US">The Capital Equipment Procurement group of Intel Corporation is responsible for developing and procuring the semiconductor processing capital equipment that is used throughout all of the company's development and manufacturing facilities. The semiconductor industry is faced with rapid technology change, increase in the complexity of the manufacturing process, and high cost of capital. In this challenging environment, the group is concerned with the following two issues required to maintain their leadership position in the industry. First is the need to evaluate risk earlier in the capital equipment specification and development cycle to ensure that the semiconductor processing capital equipment is developed on schedule (on-line, on-time) at an affordable cost. A previous model developed and used in the manufacturing readiness phase of process development serves as the basis for a new risk assessment approach. Modifications, including new risk categories, criteria, and processes enable the new model to be applied earlier, in the technology development phase. Second is the need for a more accurate cost model to capture the costs of new processes that employ equipment from existing processes at Intel. As Intel faces increasing cost pressure on some of the new commodity products it is developing, it must increase equipment reuse in its new process designs. A target costing model is developed that first sets target and baseline costs, and then tracks progress from the baseline cost until the target cost is achieved. This model is used to closely manage various cost reduction programs or projects being undertaken in its process development organization. The overall theme of this thesis is to demonstrate how these two program management systems can be used to manage</dim:field>
   <dim:field mdschema="dc" element="description" qualifier="abstract" lang="en_US">(cont.) the development of new manufacturing equipment such as needed in the semiconductor and other capital intensive industries.</dim:field>
   <dim:field mdschema="dc" element="description" qualifier="statementofresponsibility" lang="en_US">by Thomas B. Chandler.</dim:field>
   <dim:field mdschema="dc" element="description" qualifier="degree" lang="en_US">S.M.</dim:field>
   <dim:field mdschema="dc" element="description" qualifier="degree" lang="en_US">M.B.A.</dim:field>
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   <dim:field mdschema="dc" element="publisher" lang="en_US">Massachusetts Institute of Technology</dim:field>
   <dim:field mdschema="dc" element="rights" lang="en_US">M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.</dim:field>
   <dim:field mdschema="dc" element="rights" qualifier="uri">http://dspace.mit.edu/handle/1721.1/7582</dim:field>
   <dim:field mdschema="dc" element="subject" lang="en_US">Sloan School of Management.</dim:field>
   <dim:field mdschema="dc" element="subject" lang="en_US">Electrical Engineering and Computer Science.</dim:field>
   <dim:field mdschema="dc" element="subject" lang="en_US">Leaders for Manufacturing Program.</dim:field>
   <dim:field mdschema="dc" element="title" lang="en_US">Program management systems for the semiconductor processing capital equipment supply chain</dim:field>
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   	&lt;Title>Program management systems for the semiconductor processing capital equipment supply chain&lt;/Title>
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   	&lt;PublicationDate>2004&lt;/PublicationDate>
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        	&lt;DisplayName>Chandler, Thomas B. (Thomas Brian), 1970-&lt;/DisplayName>
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    &lt;Keyword>Sloan School of Management.&lt;/Keyword>
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   	&lt;Abstract>The Capital Equipment Procurement group of Intel Corporation is responsible for developing and procuring the semiconductor processing capital equipment that is used throughout all of the company&amp;apos;s development and manufacturing facilities. The semiconductor industry is faced with rapid technology change, increase in the complexity of the manufacturing process, and high cost of capital. In this challenging environment, the group is concerned with the following two issues required to maintain their leadership position in the industry. First is the need to evaluate risk earlier in the capital equipment specification and development cycle to ensure that the semiconductor processing capital equipment is developed on schedule (on-line, on-time) at an affordable cost. A previous model developed and used in the manufacturing readiness phase of process development serves as the basis for a new risk assessment approach. Modifications, including new risk categories, criteria, and processes enable the new model to be applied earlier, in the technology development phase. Second is the need for a more accurate cost model to capture the costs of new processes that employ equipment from existing processes at Intel. As Intel faces increasing cost pressure on some of the new commodity products it is developing, it must increase equipment reuse in its new process designs. A target costing model is developed that first sets target and baseline costs, and then tracks progress from the baseline cost until the target cost is achieved. This model is used to closely manage various cost reduction programs or projects being undertaken in its process development organization. The overall theme of this thesis is to demonstrate how these two program management systems can be used to manage&lt;/Abstract>
   	&lt;Abstract>(cont.) the development of new manufacturing equipment such as needed in the semiconductor and other capital intensive industries.&lt;/Abstract>
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