2026-09-18T21:42:16Zhttps://dspace.mit.edu/server/oai/requestoai:dspace.mit.edu:1721.1/348372022-01-28T19:05:11Zcom_1721.1_7582com_1721.1_7581col_1721.1_131023
Roy E. Welsch and Daniel Whitney.
Ballard, Lane P
Leaders for Manufacturing Program.
Leaders for Manufacturing Program at MIT
Massachusetts Institute of Technology. Department of Mechanical Engineering
Sloan School of Management
2006-11-08T16:46:47Z
2006-11-08T16:46:47Z
2005
2005
http://hdl.handle.net/1721.1/34837
63190609
Thesis (M.B.A.)--Massachusetts Institute of Technology, Sloan School of Management; and, (S.M.)--Massachusetts Institute of Technology, Dept. of Mechanical Engineering; in conjunction with the Leaders for Manufacturing Program at MIT, 2005.
Includes bibliographical references (p. 63).
Across Intel's microprocessor production there exists high variability on new technology process tools meeting standard, installation and qualification (I/Q) schedule durations. To reduce project schedule variability and increase time to money, Intel has begun examining critical chain management philosophies to aid in the reduction of high volume manufacturing (HVM) process tool I/Q durations. The goal of this assignment was to develop and implement a project management process using the principles of critical chain to enable continuous improvement on I/Q planning durations over technologies. Looking into the future, this thesis also examines a progression from product innovation towards process innovation in the microprocessor industry. This shift will further demand decreased I/Q durations and increased predictability for Intel on future microprocessor technology transitions.
by Lane P. Ballard.
S.M.
M.B.A.
63 p.
3510814 bytes
3513362 bytes
application/pdf
application/pdf
eng
Massachusetts Institute of Technology
M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.
http://dspace.mit.edu/handle/1721.1/7582
Sloan School of Management.
Mechanical Engineering.
Leaders for Manufacturing Program.
Application of critical chain principles to improve microprocessor technology ramps
Thesis
application/pdf
Publication
unknown
unknown
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<Abstract>Across Intel's microprocessor production there exists high variability on new technology process tools meeting standard, installation and qualification (I/Q) schedule durations. To reduce project schedule variability and increase time to money, Intel has begun examining critical chain management philosophies to aid in the reduction of high volume manufacturing (HVM) process tool I/Q durations. The goal of this assignment was to develop and implement a project management process using the principles of critical chain to enable continuous improvement on I/Q planning durations over technologies. Looking into the future, this thesis also examines a progression from product innovation towards process innovation in the microprocessor industry. This shift will further demand decreased I/Q durations and increased predictability for Intel on future microprocessor technology transitions.</Abstract>
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