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   <dim:field mdschema="dc" element="contributor" qualifier="advisor" lang="en_US">Anant Agarwal.</dim:field>
   <dim:field mdschema="dc" element="contributor" qualifier="author" lang="en_US">DeAngelis, Douglas J. (Douglas John)</dim:field>
   <dim:field mdschema="dc" element="contributor" qualifier="other" lang="en_US">Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.</dim:field>
   <dim:field mdschema="dc" element="contributor" qualifier="department">Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="accessioned">2007-01-10T16:47:22Z</dim:field>
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   <dim:field mdschema="dc" element="date" qualifier="issued" lang="en_US">2006</dim:field>
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   <dim:field mdschema="dc" element="description" lang="en_US">Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2006.</dim:field>
   <dim:field mdschema="dc" element="description" lang="en_US">"February 2006."</dim:field>
   <dim:field mdschema="dc" element="description" lang="en_US">Includes bibliographical references (leaves 77-80).</dim:field>
   <dim:field mdschema="dc" element="description" qualifier="abstract" lang="en_US">This work investigates the real-world application of MPEG-2 encoding on the Raw microprocessor. Much of the work involves partitioning the problem so that linear speedup can be achieved with respect to both number of Raw tiles and size of the video image being encoded. These speedups are confirmed through the use of real Raw hardware (up to 16 tiles) and the Raw simulator (up to 64 tiles). It will also be shown that processing power can be allocated at runtime, allowing a Raw system of the future to dynamically assign any number of tiles to the encoding task. In the process both the advantages and the limitations of the RAW architecture will be discussed.</dim:field>
   <dim:field mdschema="dc" element="description" qualifier="statementofresponsibility" lang="en_US">by Douglas J. DeAngelis.</dim:field>
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   <dim:field mdschema="dc" element="publisher" lang="en_US">Massachusetts Institute of Technology</dim:field>
   <dim:field mdschema="dc" element="rights" lang="en_US">M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.</dim:field>
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   <dim:field mdschema="dc" element="subject" lang="en_US">Electrical Engineering and Computer Science.</dim:field>
   <dim:field mdschema="dc" element="title" lang="en_US">MPEG encoding on the Raw microprocessor</dim:field>
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   	&lt;Title>MPEG encoding on the Raw microprocessor&lt;/Title>
   	&lt;Subtitle>Motion Picture Experts Group encoding on the Raw microprocessor&lt;/Subtitle>
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   	&lt;Abstract>This work investigates the real-world application of MPEG-2 encoding on the Raw microprocessor. Much of the work involves partitioning the problem so that linear speedup can be achieved with respect to both number of Raw tiles and size of the video image being encoded. These speedups are confirmed through the use of real Raw hardware (up to 16 tiles) and the Raw simulator (up to 64 tiles). It will also be shown that processing power can be allocated at runtime, allowing a Raw system of the future to dynamically assign any number of tiles to the encoding task. In the process both the advantages and the limitations of the RAW architecture will be discussed.&lt;/Abstract>
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