2026-09-19T12:53:44Zhttps://dspace.mit.edu/server/oai/requestoai:dspace.mit.edu:1721.1/367872022-01-13T07:54:29Zcom_1721.1_7582com_1721.1_7581col_1721.1_131023
William Yang and Hae-Sung Lee.
Lee, Hyunjoo Jenny
Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
2007-03-12T17:53:41Z
2007-03-12T17:53:41Z
2005
2005
http://hdl.handle.net/1721.1/36787
79619132
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2005.
Includes bibliographical references (p. 79-80).
Continuous-time sigma-delta (CT-Sigma Delta) modulators have recently received great attention in the academia as well as in the industry. Despite the improved understanding of the operation of CT-Sigma Delta modulators, the problem due to excess loop delay that arises from timing mismatch and parasitic delay still remains unsolved. Thus, the thesis investigates the effects of the excess loop delay. In specific, the sensitivity of various CT-Sigma Delta topologies to the excess loop delay is explored by converting the CT modulators to its DT equivalents and realizing loop filters in state-space representations in MATLAB ©.
by Hyunjoo Jenny Lee.
M.Eng.
80 p.
eng
Massachusetts Institute of Technology
M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.
http://dspace.mit.edu/handle/1721.1/7582
Electrical Engineering and Computer Science.
The effects of excess loop delay in continuous-time sigma-delta modulators
Thesis
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