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Joel L. Dawson. Huang, Jeffrey B Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science 2007-03-12T17:54:49Z 2007-03-12T17:54:49Z 2006 2006 http://hdl.handle.net/1721.1/36799 79651109 Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2006. Includes bibliographical references (p. 117-118). A Cartesian feedback-trained digital predistortion system for RF power amplifier linearization offers many advantages with its combination of two different linearization techniques. This thesis describes such a system, focusing on the important issue of predistorter training. It examines and analyzes in great detail the promising loop filter pre-charging optimization and the tradeoffs associated with such training, developing a model that provides many valuable system design insights. In order establish a means to experimentally verify the theory and explore predistortion training algorithms, this thesis presents the design, development, and characterization of a mock-up prototype that models the essential features of the actual Cartesian feedback-trained digital predistortion system. The mock-up serves as a standalone proof-of-concept system that demonstrates the benefits and tradeoffs of loop filter pre-charging in predistorter training. It confirms the theory while also revealing practical issues pertaining to the limits on performance. by Jeffrey B. Huang. M.Eng. 118 p. eng Massachusetts Institute of Technology M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 Electrical Engineering and Computer Science. Exploring predistortion training algorithms in a Cartesian feedback-trained digital predistortion system for RF power amplifier linearization Thesis application/pdf false Publication unknown unknown <Publication xmlns="https://www.openaire.eu/cerif-profile/1.1/" id="a9fc07f2-6db3-47b5-bab8-fd51edeea534"> <Type xmlns="https://www.openaire.eu/cerif-profile/vocab/COAR_Publication_Types">http://purl.org/coar/resource_type/c_1843</Type> <Language>eng</Language> <Title>Exploring predistortion training algorithms in a Cartesian feedback-trained digital predistortion system for RF power amplifier linearization</Title> <PublishedIn> <Publication> </Publication> </PublishedIn> <PublicationDate>2006</PublicationDate> <Authors> <Author> <DisplayName>Huang, Jeffrey B</DisplayName> <Affiliation> <OrgUnit> </OrgUnit> </Affiliation> </Author> </Authors> <Editors> </Editors> <Publishers> <Publisher> <DisplayName>Massachusetts Institute of Technology</DisplayName> <OrgUnit /> </Publisher> </Publishers> <License>http://dspace.mit.edu/handle/1721.1/7582</License> <Keyword>Electrical Engineering and Computer Science.</Keyword> <Abstract>A Cartesian feedback-trained digital predistortion system for RF power amplifier linearization offers many advantages with its combination of two different linearization techniques. This thesis describes such a system, focusing on the important issue of predistorter training. It examines and analyzes in great detail the promising loop filter pre-charging optimization and the tradeoffs associated with such training, developing a model that provides many valuable system design insights. In order establish a means to experimentally verify the theory and explore predistortion training algorithms, this thesis presents the design, development, and characterization of a mock-up prototype that models the essential features of the actual Cartesian feedback-trained digital predistortion system. The mock-up serves as a standalone proof-of-concept system that demonstrates the benefits and tradeoffs of loop filter pre-charging in predistorter training. It confirms the theory while also revealing practical issues pertaining to the limits on performance.</Abstract> <Access xmlns="http://purl.org/coar/access_right" > </Access> </Publication>