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Brendan J. Whelan. Rayanakorn, Surapap Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science 2007-04-03T17:09:21Z 2007-04-03T17:09:21Z 2006 2006 http://hdl.handle.net/1721.1/37079 83282268 Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2006. Includes bibliographical references (p. 149-151). The operational amplifier is a fundamental building block for electronic devices and systems. The advancement of modern electronic technology has been setting more performance demand on the underlying integrated circuits including the operational amplifier. Reduction in power consumption and improvement in speed are some of the most important requirements. To address these concerns, this thesis presents a design of micropower Class AB operational amplifiers which has the ratio of gain bandwidth product to supply current higher than that of an existing IC. The design is in a 0.6pxm CMOS process. The input stage of the design has the folded-cascode architecture that allows the input common-mode range down to negative supply voltage. The Class AB output stage swings rail-to-rail and has the ratio of maximum current to quiescent current greater than 100. The bias cell of the operational amplifier is designed to consume only 6% of the total supply current. The thesis concludes the operational amplifier design with two frequency compensation options. (cont.) The one with simple Miller compensation has a unity gain frequency of 360kHz with 61.5 degrees of phase margin at 100pF load while consuming 20[mu]A supply current. The other with the hybrid of simple Miller compensation and cascode compensation offers an improved unity gain frequency of 590kHz at the same loading and power condition. by Surapap Rayanakorn. M.Eng. 151 p. eng Massachusetts Institute of Technology M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 Electrical Engineering and Computer Science. Design of micropower operational amplifiers Thesis application/pdf false Publication unknown unknown <Publication xmlns="https://www.openaire.eu/cerif-profile/1.1/" id="93f17579-3313-4061-b9c6-1cbf0819a949"> <Type xmlns="https://www.openaire.eu/cerif-profile/vocab/COAR_Publication_Types">http://purl.org/coar/resource_type/c_1843</Type> <Language>eng</Language> <Title>Design of micropower operational amplifiers</Title> <PublishedIn> <Publication> </Publication> </PublishedIn> <PublicationDate>2006</PublicationDate> <Authors> <Author> <DisplayName>Rayanakorn, Surapap</DisplayName> <Affiliation> <OrgUnit> </OrgUnit> </Affiliation> </Author> </Authors> <Editors> </Editors> <Publishers> <Publisher> <DisplayName>Massachusetts Institute of Technology</DisplayName> <OrgUnit /> </Publisher> </Publishers> <License>http://dspace.mit.edu/handle/1721.1/7582</License> <Keyword>Electrical Engineering and Computer Science.</Keyword> <Abstract>The operational amplifier is a fundamental building block for electronic devices and systems. The advancement of modern electronic technology has been setting more performance demand on the underlying integrated circuits including the operational amplifier. Reduction in power consumption and improvement in speed are some of the most important requirements. To address these concerns, this thesis presents a design of micropower Class AB operational amplifiers which has the ratio of gain bandwidth product to supply current higher than that of an existing IC. The design is in a 0.6pxm CMOS process. The input stage of the design has the folded-cascode architecture that allows the input common-mode range down to negative supply voltage. The Class AB output stage swings rail-to-rail and has the ratio of maximum current to quiescent current greater than 100. The bias cell of the operational amplifier is designed to consume only 6% of the total supply current. The thesis concludes the operational amplifier design with two frequency compensation options.</Abstract> <Abstract>(cont.) The one with simple Miller compensation has a unity gain frequency of 360kHz with 61.5 degrees of phase margin at 100pF load while consuming 20[mu]A supply current. The other with the hybrid of simple Miller compensation and cascode compensation offers an improved unity gain frequency of 590kHz at the same loading and power condition.</Abstract> <Access xmlns="http://purl.org/coar/access_right" > </Access> </Publication>