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Eugene A. Fitzgerald. Chilukuri, Kamesh Massachusetts Institute of Technology. Dept. of Materials Science and Engineering. Massachusetts Institute of Technology. Department of Materials Science and Engineering 2007-05-16T18:26:52Z 2007-05-16T18:26:52Z 2006 2006 http://hdl.handle.net/1721.1/37375 104930078 Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, 2006. Includes bibliographical references (p. 102-103). The synergies associated with integrating Si-based CMOS ICs and III-V-material-based light-emitting devices are very exciting and such integration has been an active area of research and development for quite some time now. SiGe virtual substrate technology presents one way to integrate these materials. A more practical approach to monolithic integration based on the SiGe virtual substrate technology was followed in this work which involves wafer bonding and hydrogen-induced exfoliation to transfer a thin layer of device-quality silicon on top of the SiGe graded buffers to produce Silicon on Lattice Engineered Substrate (SOLES). SOLES wafers are suitable for the practical fabrication of SOI CMOS circuits and III-V-based photonic devices on a common silicon substrate. A novel monolithic CMOS compatible AlGaInP visible LED array on the SOLES platform was developed, fabricated and demonstrated in this work. The prototype array is an important breakthrough in the realization of the ultimate objective - monolithically integrated optical interconnects in high speed digital systems. by Kamesh Chilukuri. S.M. 103 p. eng Massachusetts Institute of Technology M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 Materials Science and Engineering. Development of monolithic CMOS-compatible visible light emitting diode arrays on silicon Development of monolithic complementary metal oxide semiconductor-compatible visible LED arrays on silicon Thesis application/pdf false Publication unknown unknown <Publication xmlns="https://www.openaire.eu/cerif-profile/1.1/" id="ba515e53-e0ba-465c-8d23-cde0e6633bb0"> <Type xmlns="https://www.openaire.eu/cerif-profile/vocab/COAR_Publication_Types">http://purl.org/coar/resource_type/c_1843</Type> <Language>eng</Language> <Title>Development of monolithic CMOS-compatible visible light emitting diode arrays on silicon</Title> <Subtitle>Development of monolithic complementary metal oxide semiconductor-compatible visible LED arrays on silicon</Subtitle> <PublishedIn> <Publication> </Publication> </PublishedIn> <PublicationDate>2006</PublicationDate> <Authors> <Author> <DisplayName>Chilukuri, Kamesh</DisplayName> <Affiliation> <OrgUnit> </OrgUnit> </Affiliation> </Author> </Authors> <Editors> </Editors> <Publishers> <Publisher> <DisplayName>Massachusetts Institute of Technology</DisplayName> <OrgUnit /> </Publisher> </Publishers> <License>http://dspace.mit.edu/handle/1721.1/7582</License> <Keyword>Materials Science and Engineering.</Keyword> <Abstract>The synergies associated with integrating Si-based CMOS ICs and III-V-material-based light-emitting devices are very exciting and such integration has been an active area of research and development for quite some time now. SiGe virtual substrate technology presents one way to integrate these materials. A more practical approach to monolithic integration based on the SiGe virtual substrate technology was followed in this work which involves wafer bonding and hydrogen-induced exfoliation to transfer a thin layer of device-quality silicon on top of the SiGe graded buffers to produce Silicon on Lattice Engineered Substrate (SOLES). SOLES wafers are suitable for the practical fabrication of SOI CMOS circuits and III-V-based photonic devices on a common silicon substrate. A novel monolithic CMOS compatible AlGaInP visible LED array on the SOLES platform was developed, fabricated and demonstrated in this work. The prototype array is an important breakthrough in the realization of the ultimate objective - monolithically integrated optical interconnects in high speed digital systems.</Abstract> <Access xmlns="http://purl.org/coar/access_right" > </Access> </Publication>