2026-09-19T06:52:30Zhttps://dspace.mit.edu/server/oai/requestoai:dspace.mit.edu:1721.1/379432022-01-13T07:54:29Zcom_1721.1_7582com_1721.1_7581col_1721.1_131023
Anantha P. Chandrakasan.
Sze, Vivienne
Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
2007-07-18T13:13:35Z
2007-07-18T13:13:35Z
2006
2006
http://hdl.handle.net/1721.1/37943
144571763
Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2006.
Includes bibliographical references (p. 79-83).
Ultra-wideband (UWB) communications is currently being explored as a medium for high-data-rate last-meter wireless links. Accordingly, there has been much interest in integrating UWB radios onto battery-operated devices, creating a strong demand for energy efficient UWB systems. The objective of this work is to describe how operating the digital baseband processor in the sub-threshold region and increasing the degree of parallelism can translate into energy savings across the entire UWB receiver. While sub-threshold operation is traditionally used for low energy, low performance applications such as wrist-watches, this work examines how sub-threshold operation can be applied to low energy, high performance applications. Simulation results for a 100-Mbps UWB baseband processor using the digital logic cell library of a 90-nm process are presented.
by Vivienne Sze.
S.M.
83 p.
eng
Massachusetts Institute of Technology
M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.
http://dspace.mit.edu/handle/1721.1/7582
Electrical Engineering and Computer Science.
An energy efficient sub-threshold baseband processor architecture for pulsed ultra-wideband communications
Thesis
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